[bug #21661] Make expands command-line variable defnitions after/during every command invocation

[Paul D. Smith]

Update of bug #21661 (project make):

                  Status:                    None => Not A Bug              
             Open/Closed:                    Open => Closed                 

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Follow-up Comment #3:

Dave is correct: this is exactly how make should behave; it's not a
regression (because all versions of make have always behaved this way); it's
not even a bug.  Setting a variable on the command line using "var=value" is
conceptually exactly the same as having that same assignment appear at the end
of the last makefile make reads in (because the value on the command line
takes precedence over values set in the makefile).

If you put "var=value" in your makefile, then the left hand side of the
variable will be re-expanded every time the variable "var" is referenced.

As Dave suggests, you should review the difference between simple variables
and recursive variables, and/or the difference between immediate and deferred
expansion.  You can read about these topics in the "How make Reads a Makefile"
section of the manual, here:
http://www.gnu.org/software/make/manual/html_node/Reading-Makefiles.html#Reading-Makefiles

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