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[Discuss-gnuradio] FPGA Filter Implementation

From: Dan Gisselquist
Subject: [Discuss-gnuradio] FPGA Filter Implementation
Date: Sat, 08 Jan 2005 04:46:26 +0000


In the September, 2004, Linux Journal article you mentioned a technique by Van Bose for applying a downconverter/filter/decimation operation without ever calling a sine or cosine trig function.

(For those of you who missed the article, the sine and cosine were coupled into the filter definition itself. Two filters were applied to a real data stream, one producing the real part and the other the imaginary part of a complex sample. Following the filters, the computer needed only multiply the output by a complex exponential-- requiring only one exponential library call in the whole process. -- See the Vanu Bose article at http://tns-www.lcs.mit.edu/~vanu/JSAC98.ps for a description of the technique.)

I'm curious to know if you are using this type of filter within the FPGA code?

Real input-> R filter -> R output -> Times complex expn -> output
(same input)->I filter-> I output /

If not, would it make more sense? It might spare you the CORDIC sine/ cosine computation ...



On 01/07/2005 04:56:48 PM, Eric Blossom wrote:
On Fri, Jan 07, 2005 at 06:34:16PM -0500, Achilleas Anastasopoulos
> I am amazed that even this design (wfm_rcv.py) works:
> Before the downconversion at the FPGA the entire FM band (88-108
MHz) is
> present inside the useful spectrum (with the desired station
centered at
> 5.75 MHz).
> Then the digital downconversion brings the desired station at 0.
> So far so good.

The tuner module's IF is about 6 MHz wide, so a good chunk, but not
all of the FM spectrum, is seen by the A/D.

> However, decimating at the FPGA by a factor of 250 will essentially
> spread the entire spectrum of the desired station (not a problem),
> but also all other (neighboring) stations will be aliased on top of
> desired one. These stations will appear in the desired band
> unattenuated.

In the FPGA, the frequency translation (complex mixing with cos/sin)
is performed before filtering and decimation, not the other way
around.  Thus, we get good attenuation of the other stations.

> It seems to me that before decimation at the FPGA, a LPF is required
> (probably in two stages as Matt suggested).
> Can this be done in the FPGA of the USRP?

Yes.  The decimation and lowpass filtering are combined.  The
decimator is currently built using a 4 stage CIC filter.  The receive
path in the FPGA looks conceptually like this:
Although in reality the frequency translation and sin/cos generation
are implemented with the CORDIC algorithm.  The decimating FIR filter
is the 4 stage CIC filter.  (We'll be adding a half-band filter to
improve the image rejection and flatness of the passband.)


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