[Discuss-gnuradio] (no subject)

[Anastasopoulos Achilleas]

Let me make sure I understand this:

What exactly is happening in the FPGA on the Tx side?
My guess is that there a CIC interpolator that takes
the USB complex samples and interpolates them to a
complex stream  with 32Msps, ie, 64Msps (real).
Is this accurate?

Now assuming that {z_k} represents these complex samples,
then what exactly happens in the DAC?
My guess again is the following:
y_k = z_k exp(j 2 pi fcordic k),
ie, vector rotation as Matt pointed out in one of the emails
and then interpolate the complex {y_k} to 128Msps,
ie, 256 Msps real, and sends the real and imaginary part of this stream to
the I and Q analog ouptut respectively.
Is this accurate?

Thanks
Achilleas



> Sort of.  The AD9862 CODEC chip has its own CORDIC on the TX side, so
> the TX CORDIC is not in the FPGA.  Also, we send TX samples out of the
> FPGA at 32MS/s.  The 9862 uses its CORDIC rotator on those for fine
> frequency
> adjustment, then runs 2 halfband filters to convert up to 128 MS/s, and
> then does coarse frequency adjustment on that.
>
> Effectively, you can think of it as: interpolate to 128 MS/s then do
> digital upconversion (DUC) using a  cordic to get to the desired
> frequency.
>
> Matt




>> Hi Matt,
>> I came up with the same diagram with a few difference. Could you
>> confirm them
>> ?
>>
>> - the cordic stage in TX chain is disable (V0.8)
>>
>> - DA converter can work at 128MS/s but the txsync is muxing at 32MS/s
>> for each channel