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Re: [Discuss-gnuradio] USRP Synchronization

From: John Gilmore
Subject: Re: [Discuss-gnuradio] USRP Synchronization
Date: Fri, 12 May 2006 13:27:14 -0700

> What you're describing is currently tough with the basic tx since it's
> effectively "always on" once you fire it up.  If you underrun, the
> FPGA will continue transmitting the same value to the DAC (which has
> the upconverter in it), thus even if you're "not transmitting", it's
> highly likely that you really *are* still transmitting.
> ...
>  * modify the FPGA code such that when the TX fifo is empty, you
>    ramp the value fed to the DAC down to zero over say 8 clocks.

Why would it take 8 clocks?  Surely the hardware could do the hard
part (jam it to zero immediately) and the software could do the rest
(if it needs to taper off over 8 clocks, end with the right samples).

Hmm, in fact, why is this a problem at all?  Why can't the software
ensure that the final sample before underrun is a zero?  The hardware
will then keep repeating this final sample forever.

(I suppose this would be possible if you aren't using any of the
upconverters -- but if the FPGA or the DAC is upconverting, then you
have to jam a real zero, not an upconverted zero?  Is this even


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