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Re: [Discuss-gnuradio] VHDL help!
From: |
Daniel O'Connor |
Subject: |
Re: [Discuss-gnuradio] VHDL help! |
Date: |
Mon, 5 Feb 2007 21:01:21 +1030 |
User-agent: |
KMail/1.9.5 |
On Monday 05 February 2007 20:20, Davide Anastasia wrote:
> I'm trying to realize a 1 bit quantizer on the FPGA, but I've some
> problem to understand how VHDL works!
>
> So, I hope you can help me.
> In the file /usrp/fpga/sdr_lib/rx_buffer.v there are two wire:
>
> wire [4:0] bitwidth;
> wire [3:0] bitshift;
>
> What's the function of these?
This is Verilog not VHDL..
They declare wire buses you can use to connect things together with.
--
Daniel O'Connor software and network engineer
for Genesis Software - http://www.gsoft.com.au
"The nice thing about standards is that there
are so many of them to choose from."
-- Andrew Tanenbaum
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