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RE: [Discuss-gnuradio] Re: A low-budget SDR - Was: PCIe know-how?

From: Henry Vredegoor
Subject: RE: [Discuss-gnuradio] Re: A low-budget SDR - Was: PCIe know-how?
Date: Wed, 7 Mar 2007 03:30:25 +0100

Hi All, Nos,

If I remember your initial design goals correctly:

100 Msamples/second (for a receiver bandwidth of 0 - 50 MHz)
16 bits/sample

If my simple, rough, calculation is right this would give you a minimum
bitstream over Gigabit Ethernet of:

16 * 100 M = 1600 Mbit/s or 1.6 Gbit/s !! Excluding protocol overhead.

Well over 1 Gbit/s!
So you have to do something to reduce this I suppose! ;-]

- Reducing the number Bits/sample will cost you dynamic range
- Reducing sample rate will cost you receiver bandwidth) (no undersampling)

So you have to do DDC or some clever data compression in the remote


> >
> > Listing out your requirements / wish list might be a good 
> idea before
> > just saying you want to build this generic cheap SDR board.
> I think that, realistically, I will have to do something with the data
> already at the FPGA. Be it pre-processing or decimation I do not know
> yet, nor can I guesstimate due to lack of experience. PA3FWM in the
> link Henry posted managed to deal with 2.5Msps, but I don't know his
> bit rate. I've decided in the past that I would be happy with being
> able to see just 1MHz of bandwidth at the time, and PA3FWM seems to
> have exceeded that. The benefit of using a high-speed ADC in this case
> would not be voided, since we could still do a lot of mojo that one
> can't do with a radio that requires a tuner. The lack of tuner in
> itself makes the device cheaper too...
> And what's "RBW"? =)
> -- 
> Nos
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