Re: [Discuss-gnuradio] FPGA / new rx_buffer_inband

[Brian Padalino]

On Sun, Sep 7, 2008 at 6:43 PM, Eric Schneider <address@hidden> wrote:
> On that note, I'd like to get refactoring suggestions.

I don't like all the different memory megacells.  Wrap the
altsyncram/fifo with the generics you require and pass those in using
the same module underneath.  It reduces clutter for having more of the
same thing.

You shouldn't negate the clock going into the asynchronous FIFOs at
the rx_channel_buffer level - do it at the input of the module as it
is more clear what you intend.

I'd separate out the FIFO muxing to its own module.  I'd separate out
the banking of the FIFOs (command and data) to be their own individual
modules.  I'd try to accommodate {1,2,4,8,16} bits per sample.  I'd
try to accommodate both complex and real sampling for each of the
different bit widths used.  I'd make buffer lengths generic at the top
level.  I'd accommodate for channel loop-back, bypassing the HB/CIC
filters and simply strobing the samples back to the RX side.

Those are just some ideas.  Make the interfaces as simple as possible
and most everything should fall right into place.

Brian