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Re: [Discuss-gnuradio] USRP1 DBSRX 10MHz reference clock

From: Eric Blossom
Subject: Re: [Discuss-gnuradio] USRP1 DBSRX 10MHz reference clock
Date: Tue, 16 Jun 2009 10:57:18 -0700
User-agent: Mutt/1.5.18 (2008-05-17)

On Tue, Jun 16, 2009 at 08:23:37AM -0700, Kutik wrote:
> I would like to change the USRP master clock to 10MHz.
> I call urx->set_fpga_master_clock_freq(10e6) prior to
> usrp_standard_rx::make.
> I wonder how to set the REFCLK_DIVISOR in db_dbs_rx::_refclk_divisor().
> From all examples I have seen the (master_clock/REFCLK_DIVISOR) is 4MHz.
> This would mean REFCLK_DIVISOR must be 2.5, but on the other hand it must be
> an integer..
> Can I set the REFCLK_DIVISOR to 3 (resulting in Max2118 clock 3.33MHz)? Or
> would you recommend something else?

Can you tell us what you are really trying to do?  Why do you want to
change the master clock to 10MHz?  The USRP won't function with that
slow of a clock.  It won't be able to talk over the GPIF port to the
FX2 USB controller.


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