[Discuss-gnuradio] occur error when rebuild FPGA source

[周亮]

Hi,
I am using xilinx ISE 11.1 to rebuild FPGA source.

With command
/gnuradio/usrp2/fpga/top/u2_rev3$ make bin
I get error

=========================

    while executing
"project set $key $opt -process $process"
    invoked from within
"if ![string compare $process "Project"] {
                project set $key $opt
            } else {
                project set $key $opt -process $process
            }"
    invoked from within
"if $state {
            set key $opt
            set state 0
        } else {
            puts ">>> Setting: $process\[$key\] = $opt"
            if ![string compare $process "Project"] {
            ..."
    ("foreach" body line 2)
    invoked from within
"foreach opt $options {
        if $state {
            set key $opt
            set state 0
        } else {
            puts ">>> Setting: $process\[$key\] = $opt"
            if ![string compare ..."
    (procedure "set_props" line 6)
    invoked from within
"set_props "Map" $env(MAP_PROPERTIES)"
    invoked from within
"if [file isfile $env(PROJ_FILE)] {
    puts ">>> Opening project: $env(PROJ_FILE)"
    project open $env(PROJ_FILE)
} else {   
    puts ">>> Creating project: $..."
    (file "../tcl/ise_helper.tcl" line 43)
make: *** [bin] Error 1
===================
Is it because of ISE version problem?

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