I'm kind of wondering if it wouldn't be better to reduce the DAC gain to
be able to utilize more of the DAC dynamic range without the large
signal distortion? E.g If> 0.2 amplitude "clips" the output stages
(FLEX Boards), why not reduce the output level by 5 and make the full
dynamic range is available? What is the benefit of not reducing the
gain?
(That led to my question about per daughterboard DAC gain/offset
settings)
--Eric
-------- Forwarded Message --------
From: Eric Schneider<address@hidden>
To: Matt Ettus<address@hidden>
Cc: discuss-gnuradio<address@hidden>
Subject: Re: [Discuss-gnuradio] Gain Range error / Tx LO Offset
Date: Sat, 16 Jan 2010 12:44:54 -0700
On Sat, 2010-01-16 at 10:57 -0800, Matt Ettus wrote:
On 01/16/2010 10:46 AM, Eric Schneider wrote:
Just out of curiosity, was there a design decision made to not use the
DAC PGAs to adjust Tx gain?
The issue is that changing the DAC PGA not only changes the differential
amplitude (which is what you want), it also changes the DC bias point
(i.e. the common-mode voltage). If you change the DC bias point outside
of a narrow range the upconverters don't work as well.
That makes sense. I don't understand why the DAC would be designed to
have have the DC offset calibration affected by the PGA gain, but there
are a lot of things I don't understand. :-) (IIRC, the datasheet seems
to imply that the the PGAs are suitable for use as transmitter power
control)
On a related note, I have spent some time recently trying to minimize Tx
distortion using an RFX1800 for the purpose of generating test and
measurement signals. I noted that there was non-negligible LO leakage
and related IM products, which were largely mitigated by using a large
LO offset.
I did however look into IQ DC offset and imbalance issues. Searching
the list archives showed several discussions about DC offset on the Rx
side, but little regarding the Tx side.
Instead of fiddling with the AD9862 registers directly, I made a simple
flowgraph that allowed me to adjust the IQ DC and gain components from a
sinusoid source and adjusted them while noting the LO and image levels
on a spectrum analyzer. The DC offsets and imbalance seemed nearly dead
on.
Is there any reason that my (pre-distortion) approach would not work, or
would give erroneous results? Some sort of DC leveling in the Tx signal
path somewhere?
Are Tx side DAC calibration values stored in the DB EEPROM like the Rx
ones?
The only daughterboards that really make any use of the DAC PGA settings
are the BasicTX and LFTX, which don't have this issue with common mode
voltage.
Matt
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