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Re: [Discuss-gnuradio] About clock rate of USRP E100

From: Miok Wah
Subject: Re: [Discuss-gnuradio] About clock rate of USRP E100
Date: Tue, 11 Jan 2011 19:44:36 -0800 (PST)

Hey Matt,

Thanks a lot for your help. Could you explain how to slow down the FPGA/ADC
rate?  How should we modify the firmware? Which part of the code should we
look into?  Thanks!

Matt Ettus wrote:
> As it is currently set up, there are only 2 clock rates.  The OMAP 
> processor can run at up to 720 MHz.  This clock rate is independent of 
> the FPGA, ADC, and DAC clocks.
> The ADC clock can run as high as 64 MS/s.  The DAC always runs at 
> exactly double the rate of the ADC.  The FPGA is normally running at the 
> same speed as the ADC, but you could conceivably run at 2x or 1.5x if 
> you want to go faster, or a number of speeds if you want to go slower.
> We have not tried changing the FPGA/ADC/DAC clock during normal 
> operation, but I don't think it would be worth the trouble to change it 
> dynamically.
> Matt

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