[Discuss-gnuradio] Questions about chaning the fpga codes to synchronize the TX signals between USRPs

[SHI Shougang]

Hi all,

The problem is like this,

The two USRP1s will send the same number of bits, and then I want to synchronize them in an easy way. Both of them trigger the TX signals at the same time. The requirement of synchronization is not strict and there can be a few disorder samples between them. And I will do these things:

(1)     According the USRP clocking notes(http://gnuradio.org/redmine/wiki/1/USRPClockingNotes), to synchronize the 2 USRP1s.

(2)     Considering the notes of MultiUSRP(http://gnuradio.org/redmine/wiki/gnuradio/MultiUsrp), I will select two unused IO pins from FPGA, and connect the two IO pins between Master and Slave USRP1s. One pin is used for the state of the TX buffer in Slave USRP1 and the other is used for the state of the TX buffer in Master USRP1.

(3)     In Verilog codes of USRP1,

Wire tx_empty_new = tx_empty(Master) || tx_empty(Slave);

Changing the tx_empty in module of mater_control into tx_empty_new, and then the faster one will wait for the subsequent one to trigger the TX signal at the same time.

So the method is OK or it is not so easy? Would you give me some suggestion or a better way to do this? Thank you very much.

With thanks & regards,
Fenix
HKUST
Tel:+852-67635787