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From: | Fengyuan Gong |
Subject: | Re: [Discuss-gnuradio] RSSI calculation |
Date: | Wed, 30 Mar 2011 08:33:55 -0400 |
You are looking at 2 different calculations of RSSI. The first oneOn 03/25/2011 07:52 PM, Fengyuan Gong wrote:
> Hi, All,
> I am a bit confused about RSSI calculation.
> In the given verilog code
> at http://code.ettus.com/redmine/ettus/projects/fpga/repository/revisions/8b377a9d6d0ad281474a8dbff49ea3b093178b28/entry/usrp2/sdr_lib/rssi.v
> I can see RSSI is defined by 16 bits.
>
> But in usrp_prims_common.cc, function usrp_read_aux_adc,
> *value = ((v_hi << 2) | ((v_lo >> 6) & 0x3)) << 2;// format as 12-bit
> the value is only assigned by 12 bits. I though the value is RSSI. But
> then it contradicts with format given in the verilog code. Or value is
> not RSSI?
happens in the FPGA and uses ADC values. This is in the USRP1.
The second one happens on the host and it uses the analog signal
strength measurement on the RFX900/1200/1800/2200/2400.
Matt
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