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Re: [Discuss-gnuradio] CIC decimator in software

From: J.D. Bakker
Subject: Re: [Discuss-gnuradio] CIC decimator in software
Date: Mon, 18 Apr 2011 00:06:03 +0200

I'm looking for opinions about whether doing a single-stage, N=2 decimator in software is practical for sample rates of ~100Msps. Assume reasonably-modern X86-64 hardware, and R=[2..500].

Assuming you can get the data into the processor fast enough, I expect you will.

(As a reference point: a decade ago I wrote a fourth order fixed point Bessel filter as a speedtest for my StrongARM-based SDR platform, with 16bit input, 32bit coefficients and 64bit accumulator. After a minor fixup to make it 64-bit clean, it shows a throughput of >290Msps (fixp) / >275Msps (floatp) on my vanilla Core i7-920.)

Good luck,

LART. 250 MIPS under one Watt. Free hardware design files.

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