[Discuss-gnuradio] UHD Announcement - July 19th 2011

[Josh Blum]

Hello list,

I have pulled work from the next branch into the master. If you are
working from the code in the master branch, you will need to update your
FPGA images. In the case of E100 users, this will also require a kernel
uImage and kernel modules update.

FPGA and firmware images for the master branch can be found here.
http://code.ettus.com/redmine/ettus/projects/uhd/wiki#Binary-downloads

Some changes are summarized below, for a detailed list see:
http://code.ettus.com/redmine/ettus/projects/uhd/wiki/ChangeLog

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-- USRP2 / N-series changes
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The mimo_mode device address argument was removed. It was redundant, and
there is now one proper way to set the clock and time source, which is
to set the clock configuration:
http://www.ettus.com/uhd_docs/manual/html/usrp2.html#using-the-mimo-cable

The gr-uhd blocks in gnuradio now provide per motherboard reference
source configurations, and the MIMO cable has been added as a possible
reference source option. If you have a source and sink block referring
to the same device, it is only necessary to set the reference source in
one of the blocks. See the docs in the block properties windows.

We have made significant gains in windows transmit performance. 1) The
UDP transport now uses the async (aka overlapped) IO to submit UDP
packets. And 2) It is imperative that a magical registry value be set
allow MTU sized datagrams to pass efficiently through the kernel. Docs
here:
http://www.ettus.com/uhd_docs/manual/html/transport.html#windows-specific-notes

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-- USRP E100 changes
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There is no longer any need for clock recovery and the pass-through
image after programming in bad clock rates. The UHD can bring up the
clock at every run regardless of the previous settings.

Async messages are no longer muxed into the receive path. This frees up
some overhead and thread context switching in UHD's receive fast-path.

E100 now has dual RX DSP support just like USRP2 and N-Series.

For those of you compiling UHD native on the embedded processor, you
will be pleased to find out that UHD links much-much faster.

We have changed the name of the fpga image file that the E100 code
searches for. This is to prevent the older images from being
automatically loaded. Please do not rename an older image to force it
to load. Instead, please get new images from the downloads page.

For now, please find compatible kernel images for the master branch
here:
http://www.ettus.com/downloads/uhd_releases/master_images/e100_kernel_images/

See updating kernel modules:
http://code.ettus.com/redmine/ettus/projects/usrpe1xx/wiki/BootFiles#Updating-kernel-modules
And updating the uImage:
http://code.ettus.com/redmine/ettus/projects/usrpe1xx/wiki/BootFiles#Updating-Boot-Files

-----------------------------------------------------------------------
-- Overall changes
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For USRP2, N2XX, and E100, the receive and transmit DSPs have been
reworked to include clipping and rounding, IQ imbalance compensation,
and DC offset compensation. While the fpga work is implemented, the
hooks for compensation are not yet in the host code. Expect this soon.

The "glue" code for the various USRP motherboards has been re-worked and
simplified. Duplicated code has been abstracted out. All of the various
things on a motherboard are registered into a property tree, where each
element in the tree has registered callbacks for set and get. The
multi-usrp implementation sits on top of this properties layer.
For the curious, run uhd_usrp_probe --tree

The common packet handler code has been improved. For receive, users can
expect, timestamps on packet fragments, and inline overflow messages for
USRP2/N-Series. And for transmit, timestamps on individual packets when
UHD fragments a buffer that was decorated with a timestamp.

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Feedback and testing is always welcome!
-Josh