Re: [Discuss-gnuradio] .bit file not loading on usrp n210

[Nick Foster]

Just hold down the "safe mode" button S2 when booting. The image
you're loading is probably bootstrapping the production FPGA image out
of Flash.

--n

On Tue, Oct 25, 2011 at 10:15 AM, Ian Buckley <address@hidden> wrote:
> I've only done a little FPGA work on the N210 so this is a bit of a guess, 
> Nick or Josh can answer better, but I would imagine you probably need to 
> understand how the FPGA image "bootstraps". The N210 stores 2 FPGA images so 
> that there is a safe image to restore from if you upload a bad image. This is 
> because the normal FPGA image update mechanism is via TCP/IP and hence uses 
> the FPGA...a chicken and egg problem as it were. Unless you are developing an 
> FPGA image that throws away the Ettus boot mechanism I'd suggest sticking to 
> the regular FPGA image update methodology and restrict your use of JTAG to 
> Chipscope etc.
> -Ian
>
> On Oct 25, 2011, at 9:06 AM, Clark Pope wrote:
>
>>
>> When I download a .bit file to the N210 using JTAG and Xilinx Impact the 
>> programmer says all is good:
>> // *** BATCH CMD : Program -p 1
>> PROGRESS_START - Starting Operation.
>> Maximum TCK operating frequency for this device chain: 10000000.
>> Validating chain...
>> Boundary-scan chain validated successfully.
>> '1': Programming device...
>> LCK_cycle = NoWait.
>> LCK cycle: NoWait
>> done.
>> '1': Reading status register contents...
>> CRC error                                                                  : 
>>         0
>> IDCODE not validated while writing FDRI                                    : 
>>         0
>> DCM matched                                                                : 
>>         1
>> status of GTS_CFG_B                                                        : 
>>         1
>> status of GWE                                                              : 
>>         1
>> status of GHIGH                                                            : 
>>         1
>> value of VSEL pin 0                                                        : 
>>         1
>> value of VSEL pin 1                                                        : 
>>         1
>> value of VSEL pin 2                                                        : 
>>         1
>> value of MODE pin M0                                                       : 
>>         1
>> value of MODE pin M1                                                       : 
>>         0
>> value of MODE pin M2                                                       : 
>>         0
>> value of CFG_RDY (INIT_B)                                                  : 
>>         1
>> DONEIN input from Done Pin                                                 : 
>>         1
>> POST_CRC_ERR error                                                         : 
>>         0
>> SYNC word not found                                                        : 
>>         0
>> INFO:iMPACT:2219 - Status register values:
>> INFO:iMPACT - 0011 1111 1100 1100
>> INFO:iMPACT:579 - '1': Completed downloading bit file to device.
>> INFO:iMPACT:188 - '1': Programming completed successfully.
>> LCK_cycle = NoWait.
>> LCK cycle: NoWait
>> INFO:iMPACT - '1': Checking done pin....done.
>> '1': Programmed successfully.
>> PROGRESS_END - End Operation.
>> Elapsed time =     13 sec.
>> but the .bit file isn't actually active. I know because my changes aren't 
>> present and the idcode reads the old value. I can reflash with the 
>> corresponding .bin file and cycle power and it does become active.
>> Is it possible the download is triggering a reload of the bit stored in 
>> flash? Any ideas are appreciated. Thanks
>> _______________________________________________
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>
>
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