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[Discuss-gnuradio] About AD9862 latching data

From: signalswdm
Subject: [Discuss-gnuradio] About AD9862 latching data
Date: Mon, 26 Mar 2012 23:04:13 +0800 (CST)

Dear everyone:
   You see in the FPGA codec datas are interpolated into 32Msps and sended to AD9862. Then AD9862 interpolates the datas by 4. But AD9862 is configured to latch datas using CLKOUT1,and CLKOUT1 is 64M. Though CLKOUT1 is not linked to FPGA, it seems a little confilcting.
    So can anyone tell me the how exactly AD9862 latches datas? Besides,does the 64Msps A/D and 128Msps D/A in the datasheet of AD9862 mean the maximum achievable rates or the fixed working rates? If I change the VCTCXO,for example 40M,then  will AD9862 work according to 40M?
    Any answers will be very appreciated.

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