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From: | Marcus D. Leech |
Subject: | Re: [Discuss-gnuradio] getting the fpga counter for timestamping |
Date: | Thu, 09 May 2013 18:49:51 -0400 |
User-agent: | Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.24) Gecko/20111108 Fedora/3.1.16-1.fc14 Thunderbird/3.1.16 |
On the host, you can use an API to set the FPGA time register to whatever you want:The FPGA interprets the timestamps and waits until the exact moment specified by the time to transmit. The timestamps specify an absolute time on the deviceI would like to know what is the mechanism the FPGA is using to interpret the timestamps. You are supposing there is two time references: the host's and the FPGA's. Is there a way to read the FPGA's specific register that is storing the timestamps or the value of the clock tic or whatever manner to schedule the transmission. Every explanation would be great. Best regards.
set_time_now (foo)Which will cause the FPGAs notion of the TOD to be set to "foo" as soon as it processes it. From that point forward, the FPGA TOD register is incremented
every 10 nanoseconds, based on the master clock on the device. set_time_next_pps (foo)Which will cause the FPGA to latch in the time "foo" at the next PPS edge. Just as above, the FPGA TOD register will increment every 10 nanoseconds.
There are also calls to fetch the FPGA TOD register: get_time_now ()Which will tell you what the FPGA thought the TOD was at the time the command was processed.
http://files.ettus.com/uhd_docs/doxygen/html/classuhd_1_1usrp_1_1multi__usrp.html may be useful
As might this: http://files.ettus.com/uhd_docs/manual/html/sync.html -- Marcus Leech Principal Investigator Shirleys Bay Radio Astronomy Consortium http://www.sbrac.org
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