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Re: [Discuss-gnuradio] UHD Daughter Board EEPROM Format (calibration dat

From: Marcus Müller
Subject: Re: [Discuss-gnuradio] UHD Daughter Board EEPROM Format (calibration data)
Date: Wed, 16 Oct 2013 19:02:33 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.0

Hello Alexander,
UHD does not come bundled with GNU Radio; they are two completely independent libraries. You're sending some code from UHD, but from the defines below I'm not quite sure if you're a) referring to the firmware code or b) referring to the host (PC) code.
What file exactly is this from?
Anyway, this has nothng to do with GNU Radio as such, but with the Code for Ettus USRPs. Since your question is quite complicated, please join the USRP users mailing list () and write your question to address@hidden, the folks there will be glad to help you.


I am wondering if there has been any formalized structure for storing the IQ
balance offset data in the dboard EEPROM.

The following snippet is taken from the UHD that is packaged with GNU radio
(I'm not actually sure if the UHD version is different from the GNU radio
package 3.7?)

// format of daughterboard EEPROM
// 00: 0xDB code for ``I'm a daughterboard''
// 01:   .. Daughterboard ID (LSB)
// 02:   .. Daughterboard ID (MSB)
// 03:   .. io bits  7-0 direction (bit set if it's an output from m'board)
// 04:   .. io bits 15-8 direction (bit set if it's an output from m'board)
// 05:   .. ADC0 DC offset correction (LSB)
// 06:   .. ADC0 DC offset correction (MSB)
// 07:   .. ADC1 DC offset correction (LSB)
// 08:   .. ADC1 DC offset correction (MSB)
//  ...
// 1f:   .. negative of the sum of bytes [0x00, 0x1e]

#define DB_EEPROM_MAGIC         0x00
#define DB_EEPROM_ID_LSB        0x01
#define DB_EEPROM_ID_MSB        0x02
#define DB_EEPROM_REV_LSB       0x03
#define DB_EEPROM_REV_MSB       0x04
#define DB_EEPROM_OFFSET_0_LSB  0x05 // offset correction for ADC or DAC 0
#define DB_EEPROM_OFFSET_0_MSB  0x06
#define DB_EEPROM_OFFSET_1_LSB  0x07 // offset correction for ADC or DAC 1
#define DB_EEPROM_OFFSET_1_MSB  0x08
#define DB_EEPROM_SERIAL        0x09
#define DB_EEPROM_SERIAL_LEN    0x09 //9 ASCII characters
#define DB_EEPROM_CHKSUM        0x1f

#define DB_EEPROM_CLEN          0x20 // length of common portion of eeprom

#define DB_EEPROM_CUSTOM_BASE   DB_EEPROM_CLEN // first avail offset for
                                                //   daughterboard specific

The storage of calibration data for DC offset is stored in 0x05 - 0x08.

But what about the IQ offsets?
There is a gap between reserved addresses 0x09 and 0x1f.
Is the use of this area documented?

There is a utility to calibrate the board and it generates a text file.
Presumably, the authors also implemented a method to make use of this data?

Continuing, the ettus boards driver code sets the gain, though I do not see
any request for the offset data stored in EEPROM inside the constructor or

This is a similar issue with IQ balance, ie. formalized structure for both
storing calibration data in EEPROM and then accessing it and using it during

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