I have attached a screenshot of my design.
when I start simulating it stuck and only plot a few vectors of data.
I think it's becasue of variable time shift block, it's a hierarchy block, when I connect a constant source to i'ts float input the design works perfectly but when I connect output of short to float it does not work,
I think it's becasue Argmax block produces one output for every vector but the variable time shift needs that output constantly.
how can i fix this?
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Best Regards
Mohammad Ghassemi Ahmadi
B.Sc Student of Electrical Engineering, Systems, Telecommunications
University of Tehran, FPGA lab. College of Engineering, Tehran, Iran
ofdm_loopback.grc.png