| In general an application needs to have been designed for the start to use RFNOc. I don’t think there are any generic guides for existing applications.
Sent from my iPhone On Apr 13, 2021, at 3:43 AM, Louis Jung <insomnia@asleep.ai> wrote:
Thank you for your answer!Then, if I want to run some OOT modules (i.e., gr-csitool) on E310, I need to change it to use RFNOC blocks, is it right?Is there any reference or guide to port from gnuradio blocks to RFNOC blocks?Best,2021. 4. 13. 오후 12:47, Marcus D Leech <patchvonbraun@gmail.com> 작성:
The Zynq CPU cannot possibly sustain sample rates of 10s of MSPS. The E3xx series have larger FPGAs that support the RFNOc framework that support high sample rate signal flows within the FPGA.
Sent from my iPhone
On Apr 12, 2021, at 10:55 PM, Louis Jung <insomnia@asleep.ai> wrote:
Hi all,
I’m currently testing USRP E310.
When I check the functionality of E310, I found a limitation on its sample rate.
The test setup is TX (E310) transmits a sinusoidal signal (signal frequency 1k) continuously to RX (B210 with another host machine) with different sample rate(1M - 10M).
USRP Sink’s center frequency is 5 GHz band and gain is 0.75 (normalized), and I’ve set its master clock rate 60 MHz.
When the sample rate is lower than 10 MHz, RX shows clear sine wave.
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However, when I increased it to 10 MHz, the signal is crashed.
<22.png>
Is it the limitation of E310? Or I configured wrongly?
Any help would be great to me.
Best,
Jinhwan
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