Re: ARM branch

[Francesco Lavra]

Hi,

On 05/01/2013 08:32 PM, Leif Lindholm wrote:
> On Fri, Apr 12, 2013 at 07:33:21PM +0200, Vladimir 'φ-coder/phcoder' 
> Serbinenko wrote:
>> Hello, all. I've uploaded Leif's and my ARM code to
>> http://bzr.savannah.gnu.org/lh/grub/branches/arm/changes. Francesco's
>> code will be added as well once his papers are done. The only dirty part
>> for Raspberry pi that I didn't upload is:
> 
> I have attached a patch (against this branch) that contains build
> system fixes and changes to the assembly files in order to permit the 
> same target-platform combination to build correctly on both ARMv6 and
> ARMv7, with no special options required.
[...]
> === modified file 'grub-core/kern/arm/cache.S'
> --- grub-core/kern/arm/cache.S        2013-04-07 00:41:07 +0000
> +++ grub-core/kern/arm/cache.S        2013-04-28 12:48:56 +0000
[...]
> @@ -149,21 +137,26 @@
>  clean_invalidate_dcache:
>       push    {r4-r12, lr}
>       mrc     p15, 1, r0, c0, c0, 1   @ Read CLIDR
> -     ubfx    r1, r0, #24, #3         @ Extract LoC
> -     
> +     lsr     r1, r0, #24             @ Extract LoC
> +     and     r1, r1, #0x7
> +
>       mov     r2, #0                  @ First level, L1
>  2:   and     r8, r0, #7              @ cache type at current level
>       cmp     r8, #2
>       blt     5f                      @ instruction only, or none, skip level
>  
> -     @ set current cache level/type (for CSSIDR read)
> +     @ set current cache level/type (for CCSIDR read)
>       lsl     r8, r2, #1
>       mcr     p15, 2, r8, c0, c0, 0   @ Write CSSELR (level, type: data/uni)
>  
>       @ read current cache information
> -     mrc     p15, 1, r8, c0, c0, 0   @ Read CSSIDR
> -     ubfx    r3, r8, #13, #14        @ Number of sets -1
> -     ubfx    r4, r8, #3, #9          @ Number of ways -1
> +     mrc     p15, 1, r8, c0, c0, 0   @ Read CCSIDR

Unfortunately, in ARMv6 there are no such things as CLIDR, CSSELR and
CCSIDR.

--
Francesco