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Re: [LLVMdev] clang .code16 with -Os producing larger code that it needs

From: David Woodhouse
Subject: Re: [LLVMdev] clang .code16 with -Os producing larger code that it needs to
Date: Tue, 24 Feb 2015 09:07:12 +0000

On Tue, 2015-02-24 at 00:42 -0800, Craig Topper wrote:
> Does gas really relax from 16-bit addresses to 32-bit address as
> necessary? I played around briefly and it looks like gas will only
> emit 16-bit addresses in 16-bit mode unless addr32 is prefixed. Even
> for an external symbol it only emitted a 16-bit relocation type until
> I added addr32.

I believe you are correct. My use of 32-bit relocations in LLVM was
mostly because we didn't yet support addr32. Having code which is
correct but slightly larger than needed was better than having some
things which you just *couldn't* build, in the short term.

> I wonder if we shouldn't fix the x86 encoder to use 16-bit addresses
> in 16-bit mode.

Yes, we should. Having implemented the addr32 prefix first.

>  (Actually I think we're emitting 0x67 prefix because the displacement
> size check in Is16BitMemOperand doesn't like cases where displacement
> isExpr instead of isImm). And maybe override the mode in SubTargetInfo
> around the EmitInstruction call for any that specifies "addr32" in
> 16-bit mode or "addr16" in 32-bit mode?
> That doesn't help with jumps though since they do need their opcode
> switched to JMP_2 instead of JMP_4. Again I can't prove that gas will
> further relax 2-byte to 4-byte without addr32. I think we either need
> to again change SubTargetInfo and pass it into relaxInstruction OR we
> could create new 16-bit mode only 1-byte jumps that we can parse based
> on mode and relax to the 2 byte form.

I don't think we need a new opcode for a 16-bit mode 1-byte jump, do we?
The mode is already stored in the MCInst because I needed to do that to
fix PR18303.

David Woodhouse                            Open Source Technology Centre
address@hidden                              Intel Corporation

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