Re: [PATCH 3/5] ns8250: Add base support for MMIO UARTs

[Benjamin Herrenschmidt]

On Mon, 2022-05-23 at 19:11 +0200, Sven Anderson wrote:
> 
> I had a couple of sleepless nights trying to find out why this didn't
> work for my MMIO UART (Intel Cannon Lake PCH Intel C246), so I
> thought I would share my findings with others in a similar situation.
> (See below.)
>  
 .../...
> 
> This code assumes that the registers are only 8 bit wide. Apparently
> for my chipset they are 32 bits wide, so it only (finally) worked
> when I rewrote this code to address and write full grub_uint32_t
> values, like this: 
> 
> ------
>   volatile grub_uint32_t* p = (void*)(port->mmio_base);
>   *(p + reg) = (grub_uint32_t)(value);
> ------

Sorry, I dopped the ball on this for a while. Getting back to it and
will re-submit the patches.

Can you send me a dump of your SPCR table ? I'd like to see if it
properly says "32-bit" there to auto-detect this.

Cheers,
Ben.