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[Guile-commits] 264/437: ARM: Do not use ldrt/strt by default
From: |
Andy Wingo |
Subject: |
[Guile-commits] 264/437: ARM: Do not use ldrt/strt by default |
Date: |
Mon, 2 Jul 2018 05:14:33 -0400 (EDT) |
wingo pushed a commit to branch lightning
in repository guile.
commit 2d4bac43a9b746ec93fa02832fa4cc8ae7ea0a53
Author: pcpa <address@hidden>
Date: Tue Oct 8 12:26:52 2013 -0300
ARM: Do not use ldrt/strt by default
* include/lightning/jit_arm.h, lib/jit_arm-cpu.c: Do not use
by default load/store instructions that map to ldrt/strt.
There is already the long displacement version for positive
offsets, and when using a (shorter) negative offset it does
not map to ldrt/strt. At least on qemu strt may cause
reproducible, but unexpected SIGILL.
---
ChangeLog | 9 +++++++++
include/lightning/jit_arm.h | 6 ++++++
lib/jit_arm-cpu.c | 16 ++++++++--------
3 files changed, 23 insertions(+), 8 deletions(-)
diff --git a/ChangeLog b/ChangeLog
index 1fe7608..13aa358 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,14 @@
2013-10-08 Paulo Andrade <address@hidden>
+ * include/lightning/jit_arm.h, lib/jit_arm-cpu.c: Do not use
+ by default load/store instructions that map to ldrt/strt.
+ There is already the long displacement version for positive
+ offsets, and when using a (shorter) negative offset it does
+ not map to ldrt/strt. At least on qemu strt may cause
+ reproducible, but unexpected SIGILL.
+
+2013-10-08 Paulo Andrade <address@hidden>
+
* lib/jit_arm-vfp.c: Correct wrong load/store offset
calculation when the displacement is constant but too
large to use an instruction with an immediate offset.
diff --git a/include/lightning/jit_arm.h b/include/lightning/jit_arm.h
index 6c8ede8..1db7593 100644
--- a/include/lightning/jit_arm.h
+++ b/include/lightning/jit_arm.h
@@ -28,6 +28,7 @@
*/
#define jit_swf_p() (jit_cpu.vfp == 0)
#define jit_hardfp_p() jit_cpu.abi
+#define jit_ldrt_strt_p() jit_cpu.ldrt_strt
#define JIT_FP _R11
typedef enum {
@@ -115,6 +116,11 @@ typedef struct {
jit_uint32_t vfp : 3;
jit_uint32_t neon : 1;
jit_uint32_t abi : 2;
+ /* use strt+offset instead of str.w?
+ * on special cases it causes a SIGILL at least on qemu, probably
+ * due to some memory ordering constraint not being respected, so,
+ * disable by default */
+ jit_uint32_t ldrt_strt : 1;
} jit_cpu_t;
typedef jit_int64_t jit_regset_t;
diff --git a/lib/jit_arm-cpu.c b/lib/jit_arm-cpu.c
index c91ac6e..c0419c3 100644
--- a/lib/jit_arm-cpu.c
+++ b/lib/jit_arm-cpu.c
@@ -2953,7 +2953,7 @@ _ldxi_c(jit_state_t *_jit, jit_int32_t r0, jit_int32_t
r1, jit_word_t i0)
{
jit_int32_t reg;
if (jit_thumb_p()) {
- if (i0 >= 0 && i0 <= 255)
+ if (jit_ldrt_strt_p() && i0 >= 0 && i0 <= 255)
T2_LDRSBI(r0, r1, i0);
else if (i0 < 0 && i0 >= -255)
T2_LDRSBIN(r0, r1, -i0);
@@ -3036,7 +3036,7 @@ _ldxi_uc(jit_state_t *_jit, jit_int32_t r0, jit_int32_t
r1, jit_word_t i0)
if (jit_thumb_p()) {
if ((r0|r1) < 8 && i0 >= 0 && i0 < 0x20)
T1_LDRBI(r0, r1, i0);
- else if (i0 >= 0 && i0 <= 255)
+ else if (jit_ldrt_strt_p() && i0 >= 0 && i0 <= 255)
T2_LDRBI(r0, r1, i0);
else if (i0 < 0 && i0 >= -255)
T2_LDRBIN(r0, r1, -i0);
@@ -3117,7 +3117,7 @@ _ldxi_s(jit_state_t *_jit, jit_int32_t r0, jit_int32_t
r1, jit_word_t i0)
{
jit_int32_t reg;
if (jit_thumb_p()) {
- if (i0 >= 0 && i0 <= 255)
+ if (jit_ldrt_strt_p() && i0 >= 0 && i0 <= 255)
T2_LDRSHI(r0, r1, i0);
else if (i0 < 0 && i0 >= -255)
T2_LDRSHIN(r0, r1, -i0);
@@ -3200,7 +3200,7 @@ _ldxi_us(jit_state_t *_jit, jit_int32_t r0, jit_int32_t
r1, jit_word_t i0)
if (jit_thumb_p()) {
if ((r0|r1) < 8 && i0 >= 0 && !(i0 & 1) && (i0 >> 1) < 0x20)
T1_LDRHI(r0, r1, i0 >> 1);
- else if (i0 >= 0 && i0 <= 255)
+ else if (jit_ldrt_strt_p() && i0 >= 0 && i0 <= 255)
T2_LDRHI(r0, r1, i0);
else if (i0 < 0 && i0 >= -255)
T2_LDRHIN(r0, r1, -i0);
@@ -3286,7 +3286,7 @@ _ldxi_i(jit_state_t *_jit, jit_int32_t r0, jit_int32_t
r1, jit_word_t i0)
else if (r1 == _R13_REGNO && r0 < 8 &&
i0 >= 0 && !(i0 & 3) && (i0 >> 2) <= 255)
T1_LDRISP(r0, i0 >> 2);
- else if (i0 >= 0 && i0 <= 255)
+ else if (jit_ldrt_strt_p() && i0 >= 0 && i0 <= 255)
T2_LDRI(r0, r1, i0);
else if (i0 < 0 && i0 > -255)
T2_LDRIN(r0, r1, -i0);
@@ -3369,7 +3369,7 @@ _stxi_c(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0,
jit_int32_t r1)
if (jit_thumb_p()) {
if ((r0|r1) < 8 && i0 >= 0 && i0 < 0x20)
T1_STRBI(r1, r0, i0);
- else if (i0 >= 0 && i0 <= 255)
+ else if (jit_ldrt_strt_p() && i0 >= 0 && i0 <= 255)
T2_STRBI(r1, r0, i0);
else if (i0 < 0 && i0 >= -255)
T2_STRBIN(r1, r0, -i0);
@@ -3441,7 +3441,7 @@ _stxi_s(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0,
jit_int32_t r1)
if (jit_thumb_p()) {
if ((r0|r1) < 8 && i0 >= 0 && !(i0 & 1) && (i0 >> 1) < 0x20)
T1_STRHI(r1, r0, i0 >> 1);
- else if (i0 >= 0 && i0 <= 255)
+ else if (jit_ldrt_strt_p() && i0 >= 0 && i0 <= 255)
T2_STRHI(r1, r0, i0);
else if (i0 < 0 && i0 >= -255)
T2_STRHIN(r1, r0, -i0);
@@ -3516,7 +3516,7 @@ _stxi_i(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0,
jit_int32_t r1)
else if (r0 == _R13_REGNO && r1 < 8 &&
i0 >= 0 && !(i0 & 3) && (i0 >> 2) <= 255)
T1_STRISP(r1, i0 >> 2);
- else if (i0 >= 0 && i0 <= 255)
+ else if (jit_ldrt_strt_p() && i0 >= 0 && i0 <= 255)
T2_STRI(r1, r0, i0);
else if (i0 < 0 && i0 >= -255)
T2_STRIN(r1, r0, -i0);
- [Guile-commits] 195/437: Minor updates when testing on a prototype, quadcore Loongson mips., (continued)
- [Guile-commits] 195/437: Minor updates when testing on a prototype, quadcore Loongson mips., Andy Wingo, 2018/07/02
- [Guile-commits] 332/437: Add test case to check possible issues with 2 contexts, Andy Wingo, 2018/07/02
- [Guile-commits] 189/437: Pass all but the (not yet implemented) qmul and qdiv tests in sparc, Andy Wingo, 2018/07/02
- [Guile-commits] 217/437: Adjust lightning to work on ppc AIX., Andy Wingo, 2018/07/02
- [Guile-commits] 223/437: Build and pass all tests on big endian Irix mips using the n32 abi., Andy Wingo, 2018/07/02
- [Guile-commits] 205/437: Properly split instruction groups for predicate registers., Andy Wingo, 2018/07/02
- [Guile-commits] 391/437: aarch64: Correct va_list offsets and double load., Andy Wingo, 2018/07/02
- [Guile-commits] 304/437: Correct typo in documentation., Andy Wingo, 2018/07/02
- [Guile-commits] 409/437: Correct binutils version detection, Andy Wingo, 2018/07/02
- [Guile-commits] 310/437: Allow jit_jmpi on an immediate constant address., Andy Wingo, 2018/07/02
- [Guile-commits] 264/437: ARM: Do not use ldrt/strt by default,
Andy Wingo <=
- [Guile-commits] 244/437: HPPA: Correct bogus logic when calling function pointers., Andy Wingo, 2018/07/02
- [Guile-commits] 273/437: x86: Ensure the x87 stack is empty when calling a function., Andy Wingo, 2018/07/02
- [Guile-commits] 126/437: Cleanup on preparation for lightning rework., Andy Wingo, 2018/07/02
- [Guile-commits] 364/437: GNU lightning 2.1.0 release, Andy Wingo, 2018/07/02
- [Guile-commits] 242/437: Add missing jit_clear_state to documentation sample., Andy Wingo, 2018/07/02
- [Guile-commits] 417/437: HPPA: Correct wrong regarg_p check, Andy Wingo, 2018/07/02
- [Guile-commits] 333/437: Implement jit_flush, Andy Wingo, 2018/07/02
- [Guile-commits] 316/437: Implement the jit_rsb* interface., Andy Wingo, 2018/07/02
- [Guile-commits] 358/437: Add new --enable-devel-disassembler configure option, Andy Wingo, 2018/07/02
- [Guile-commits] 262/437: Rerun tests on supported backends after bogus self test correction, Andy Wingo, 2018/07/02