Bulletin of the American Physical Society
2024 APS March Meeting
Monday–Friday, March 4–8, 2024; Minneapolis & Virtual
Session M49: Decoders for Quantum Error CorrectionFocus

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Sponsoring Units: DQI Chair: Edward Chen, IBM Research Room: 200G 
Wednesday, March 6, 2024 8:00AM  8:36AM 
M49.00001: A realtime, scalable, fast and highly resource efficient decoder for a quantum computer Invited Speaker: Earl Campbell Quantum computers promise to solve computing problems that are currently intractable using traditional approaches. This can only be achieved if the noise inevitably present in quantum computers can be efficiently managed at scale. A key component in this process is a classical decoder, which diagnoses the errors occurring in the system. If the decoder does not operate fast enough, an exponential slowdown in the logical clock rate of the quantum computer occurs. Additionally, the decoder must be resourceefficient to enable scaling to larger systems and potentially operate in cryogenic environments. Here we introduce the Collision Clustering decoder, which overcomes both challenges. We implement our decoder on both an FPGA and ASIC, the latter ultimately being necessary for any costeffective scalable solution. We simulate a logical memory experiment on large instances of the leading quantum error correction scheme, the surface code, assuming a circuitlevel noise model. The FPGA decoding frequency is above a megahertz, a stringent requirement on decoders needed for e.g. superconducting quantum computers. To decode an 881 qubit surface code it uses only 4.5% of the available logical computation elements. The ASIC decoding frequency is also above a megahertz on a 1057 qubit surface code, and occupies 0.06 mmsq area and consumes 8 mW of power. Our decoder is optimised to be both highly performant and resource efficient, while its implementation on hardware constitutes a viable path to practically realising faulttolerant quantum computers. 
Wednesday, March 6, 2024 8:36AM  8:48AM 
M49.00002: Demonstration of RealTime Decoding in a Quantum Control Stack within 500 ns Francesco Battistel, Namitha Liyanage, Francesco Maio, Calin Sindile, Jordy Gloudemans, Jules van Oven, Cornelis Christiaan Bultink The effectiveness of quantum error correction (QEC) is underpinned by the decoder, which in a universal faulttolerant quantum computer has to run in real time, on an extremely tight schedule (e.g., microsecond timescale for superconducting qubits). So far, the QEC literature has predominantly focused on the QECcode design and decoder accuracy. However, its realtime implementation is a critical milestone. First, realtime decoding requires a fast decoding algorithm running on suitable computational resources. A comprehensive review and perspective can be found in Battistel et al (arXiv:2303.00054). We identify the unionfind Helios decoder by Liyanage et al (arXiv:2301.08419) as one of the most promising candidates. Second, realtime decoding requires communication of measurement results before the ones from the previous QEC cycle are generated, as well as lowlatency communication of decoder outcome. In particular, to prove the feasibility of realtime decoding, it is necessary to demonstrate this using an FPGA (or ASIC) that is tightly integrated with the quantum control stack. While there have been previous implementations of standalone FPGA decoders, and numerous software decoders, there is a lack of demonstrations showcasing decoding within a quantum control stack. We adapt the unionfind Helios decoder by Liyanage et al to run within 128 nanoseconds for a 3x3x3 surface code in an FPGA sequence processor and within 500 ns for the full round in the control stack. The decoding module is designed to seamlessly interface with the distributed communication network running over the backplane of the control system. This work is a milestone towards bringing realtime decoding to experimental reality. We envision a decoding platform to extend the available decoding set to other promising decoders. 
Wednesday, March 6, 2024 8:48AM  9:00AM 
M49.00003: MultiFPGA UnionFind Decoder for Surface Codes Namitha Godawatte Liyanage, Yue Wu, Siona Tagare, Lin Zhong A faulttolerant quantum computer must have an accurate and realtime quantum error correction decoder. For superconducting qubits, the decoder should have an average throughput of around 1 us per measurement round with minimal latency to prevent a backlog of measurements from accumulating. The distributed UnionFind (UF) decoder by Liyanage et.al (arXiv:2301.08419) is a promising candidate with a sublinear average time complexity with regard to code distance (d). However, the resource usage of the decoder grows O(d3log(d)), thus the available resources in a single FPGA limit decoding large surface codes or performing multilogical qubit operations such as lattice surgery. 
Wednesday, March 6, 2024 9:00AM  9:12AM 
M49.00004: Scaling HardwareBased Quantum Error Correction via a MultiContext Approach JanErik R Wichmann, Maximilian J Heer, Kentaro Sano The theory of quantum error correction is well understood, though its practical implementation remains challenging. This is due to the lowlatency requirements for the classical computations that are required to carry out the quantum error correction. Recent advancements have shown that it is possible to meet these requirements for surface codes using algorithms implemented in FPGA hardware [1]. While it has been shown that the execution time of the algorithm scales favorably with increasing physical qubit numbers, the hardware ressource consumption grow to the third power, limiting the maximum number of qubits that can be used. 
Wednesday, March 6, 2024 9:12AM  9:24AM 
M49.00005: Correlated decoding of logical qubit algorithms with transversal gates Madelyn Cain, Dolev Bluvstein, Nadine Meister, Chen Zhao, Pablo Bonilla Ataides, Hengyun Zhou, Mikhail D Lukin Quantum error correction is essential to perform reliable quantum computation at scale. Recent experiments have realized errorcorrected quantum algorithms on a multiqubit logical processor, crucially relying on the use of transversal gates. Here we observe that the performance of such algorithms can be substantially improved by accounting for physical error propagation during transversal gates and decoding the logical qubits jointly. We find that this correlated decoding significantly improves the thresholds of both Clifford and nonClifford transversal entangling gates, and we explore several decoders offering different computational runtimes and accuracies. We then apply correlated decoding to deep logical circuits with noisy syndrome extraction and find that significantly higher fidelities can be reached by utilizing this technique to reduce the number of rounds of noisy syndrome extraction per gate. This correlated decoding technique offers key advantages in early faulttolerant computation, as well as the possibility for reduction in the spacetime cost of deep circuit logical algorithms. 
Wednesday, March 6, 2024 9:24AM  9:36AM 
M49.00006: Hypergraph MinimumWeight Parity Factor Decoder for QEC Yue Wu, Lin Zhong, Shruti Puri MinimumWeight Perfect Matching (MWPM) decoder on graphs has been widely used for decoding errors in the surface code and shows high performance when noise is not correlated. However, it cannot effectively decode correlated noise or decode general codes where a single error produces multiple syndromes. In these cases, the decoding problem reduces to finding the MinimumWeight Parity Factor (MWPF) on hypergraphs. In this work, we introduce and implement an approximate MWPF decoder on hypergraphs. We test the performance of the decoder for decoding correlated noise on the surface code and find that the decoding accuracy drastically improves compared to that of the MWPM decoder. Most importantly, it shows almost linear average time complexity given a sufficiently low physical error rate. 
Wednesday, March 6, 2024 9:36AM  9:48AM 
M49.00007: Decoding surfacecode experiments with a recurrent neural network decoder Boris M Varbanov, Marc SerraPeralta, David Byfield, Barbara M Terhal Quantum error correction offers a way to reach the low error rates needed to perform useful computations at the expense of an increase in the qubit overhead. A more accurate decoder leads to better logical performance, which can substantially reduce this overhead. Neural network decoders are particularly promising since they do not require any prior information about the physical noise. 
Wednesday, March 6, 2024 9:48AM  10:00AM 
M49.00008: Scalable Graph Neural Network Decoders for Quantum LDPC Codes Arshpreet S Maan, Alexandru Paler Decoding quantum low density parity checks (QLDPC) codes shares similarities with the decoding of classical LDPC codes. In general, QLDPC decoding requires postprocessing which is a time consuming procedure. Neural network (NN) decoders, with their constant time execution, have also been proposed for QLDPC codes. However, their training is very time consuming and once trained, a NN decoder cannot extrapolate (ie. train on a lower distance, and use it for larger distances) and can only be used on that particular code distance on which it was trained on. We present a novel graphNN decoder which is trained on the Tanner graph of the QLDPC code. We benchmark our decoder on depolarizing noise and decode surface QECCs of distance 3, 5 and 7. We illustrate the extrapolation capabilities of our graphNN decoder, and present numerical evidence that it achieves thresholds comparable to decoders using belief propagation combined with ordered statistics postprocessing. 
Wednesday, March 6, 2024 10:00AM  10:12AM 
M49.00009: A fast renormalizationgroup tensornetwork decoder for planar quantum lowdensity paritycheck codes Cole Maurer, Andrew J Landahl We present a fast and Bayesoptimalapproximating tensor network decoder for planar quantum 
Wednesday, March 6, 2024 10:12AM  10:24AM 
M49.00010: Fast and accurate decoder for the XZZX code using simulated annealing Tatsuya Sakashita, Jun Fujisaki, Hirotaka Oshima, Shintaro Sato, Keisuke Fujii The XZZX code is a variant of the surface code to incorporate biased noise in realistic quantum device. Although, as decoders of surface codes, minimumweight perfect matching (MWPM) algorithm is widely used, it can take into account only X (bitflip) and Z (phaseflip) errors, not Y (bitflip and phaseflip) errors. To handle Y errors appropriately, Markov chain Monte Carlo (MCMC) decoders and matrix product state (MPS) decoders have been researched, and however, these decoders are too slow. For the XZZX code, we formulate decoding as energy minimization problem of Ising model, and apply simulated annealing (SA) to solve them. Specifically, to prepare an initial configuration of SA, we propose to employ recovery chains obtained by a greedy matching decoder, which brings us fast convergence of SA. By numerical simulation for code capacity noise model where only data qubits suffer errors, we confirmed that our SA decoder is more accurate than the MWPM decoder. Furthermore, our SA decoder attained the accuracy, equivalent to the optimal decoder formulated by integer programming. By comparing decoding times of our SA decoder, the decoder by the integer programming, and the MPS decoder, we confirmed that our SA decoder is fastest if parallelized. This result implies a possibility of the combination of our greedy matching and SA decoders in quantum error correction. 
Wednesday, March 6, 2024 10:24AM  10:36AM 
M49.00011: Hardness results for decoding the surface code with Pauli noise Alex Fischer, Akimasa Miyake Real quantum computers will be subject to complicated, qubitdependent noise, instead of simple noise such as depolarizing noise with the same strength for all qubits. We can do quantum error correction more effectively if our decoding algorithms take into account this prior information about the specific noise present. This motivates us to consider the complexity of surface code decoding where the input to the decoding problem is not only the syndromemeasurement results, but also a noise model in the form of probabilities of singlequbit Pauli errors for every qubit. 
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