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Re: Racket REPL not working

From: Zelphir Kaltstahl
Subject: Re: Racket REPL not working
Date: Mon, 15 May 2023 21:58:46 +0000

On 5/15/23 18:18, Efraim Flashner wrote:
On Sun, May 14, 2023 at 09:56:35PM +0000, Zelphir Kaltstahl wrote:
Hello Guix users / package maintainers,

I updated guix today using `guix pull && guix package -u`, but even before
that, I had an issue starting a Racket REPL simply entering `racket`:

$ racket
Segmentation fault (core dumped)

I am currently at guix:

$ guix describe --format=channels
(list (channel
         (name 'guix)
         (branch "master")
               "BBB0 2DDF 2CEA F6A8 0D1D  E643 A2A0 6DF2 A33A 54FA")))))

$ guix describe
Generation 42   Mai 14 2023 23:45:08    (current)
   guix c5fa9dd
     repository URL:
     branch: master
     commit: c5fa9dd0e96493307cc76ea098a6bca9b076e012

Not sure what is up, or whether it is only on my end for some reason.

Also cannot call `racket --version`:

$ racket --version
Segmentation fault (core dumped)
I was able to run 'guix shell racket -- racket --version' with it
segfaulting. Same thing when I switched to using the same commit that
you're using.

Can you paste the output of 'lscpu'? I suspect that there might be some
optimizations being applied during build time and it's been optimized
with features not available in your CPU.

Hello Efraim,

Here is the output of `lscpu`:

$ lscpu
Architecture:            x86_64
  CPU op-mode(s):        32-bit, 64-bit
  Address sizes:         39 bits physical, 48 bits virtual
  Byte Order:            Little Endian
CPU(s):                  4
  On-line CPU(s) list:   0-3
Vendor ID:               GenuineIntel
  Model name:            Intel(R) Core(TM) i7-7500U CPU @ 2.70GHz
    CPU family:          6
    Model:               142
    Thread(s) per core:  2
    Core(s) per socket:  2
    Socket(s):           1
    Stepping:            9
    CPU max MHz:         3500,0000
    CPU min MHz:         400,0000
    BogoMIPS:            5799.77
    Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mc
                         a cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss
                         ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art
                          arch_perfmon pebs bts rep_good nopl xtopology nonstop_
                         tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cp
                         l vmx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1
                          sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsav
                         e avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault
                          epb invpcid_single pti ssbd ibrs ibpb stibp tpr_shadow
                          vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust
                         sgx bmi1 avx2 smep bmi2 erms invpcid mpx rdseed adx sma
                         p clflushopt intel_pt xsaveopt xsavec xgetbv1 xsaves dt
                         herm ida arat pln pts hwp hwp_notify hwp_act_window hwp
                         _epp md_clear flush_l1d arch_capabilities
Virtualization features:
  Virtualization:        VT-x
Caches (sum of all):
  L1d:                   64 KiB (2 instances)
  L1i:                   64 KiB (2 instances)
  L2:                    512 KiB (2 instances)
  L3:                    4 MiB (1 instance)
  NUMA node(s):          1
  NUMA node0 CPU(s):     0-3
  Itlb multihit:         KVM: Mitigation: VMX disabled
  L1tf:                  Mitigation; PTE Inversion; VMX conditional cache flushe
                         s, SMT vulnerable
  Mds:                   Mitigation; Clear CPU buffers; SMT vulnerable
  Meltdown:              Mitigation; PTI
  Mmio stale data:       Mitigation; Clear CPU buffers; SMT vulnerable
  Retbleed:              Mitigation; IBRS
  Spec store bypass:     Mitigation; Speculative Store Bypass disabled via prctl
                          and seccomp
  Spectre v1:            Mitigation; usercopy/swapgs barriers and __user pointer
  Spectre v2:            Mitigation; IBRS, IBPB conditional, RSB filling, PBRSB-
                         eIBRS Not affected
  Srbds:                 Mitigation; Microcode
  Tsx async abort:       Not affected


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