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problems with 'include'

From: Justin Chen-Wells
Subject: problems with 'include'
Date: Thu, 14 Nov 2002 11:37:03 -0500

Hi, I am having trouble using include. I am trying to get it to 
generate two include files, but I want to use variables defined in 
one include file as part of the build process for the other. 

It doesn't always work:

        -include include1 include2

                @echo A=$(A)
                @echo B=$(B)

                @echo "A := hello" > $@ 

                @echo "B := $(A)" > $@

                rm include1 include2

So in the above I am using the value $(A) that is defined in the 
first generated make file in the commands that generate the second.

If you run the above it will print out "B=" (empty value) indicating
that $(A) was undefined when it executed the commands for include2.
This would imply that you cannot use elements in an included makefile
in the rules that generate another makefile.

However if you first run "make include1" and then you run "make"
it will display "B=hello" because apparently in that case it DOES
pick up and use the values. 

How can I get this to work automatically, so that you do not have to
do a "make include1" before making other targets?


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