[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]


From: Noel Yap
Subject: __FILE__
Date: Tue, 19 Aug 2003 12:52:40 -0400

I know this has been discussed before.  For those not familiar with it, 
__FILE__ as an implicit file-local variable has been proposed to allow modular 
recursive inclusion of makefiles.

Although I think this would be a great addition, I don't want to fight this 
battle :-)

Rather, I was wondering if the following would be a decent substitute.

define _include-makefile
  __FILE__.pre-$(1) := $(__FILE__)
  __FILE__ := $(1)
  include $(1)
  __FILE__ := $(__FILE__.pre-$(1))

include-makefile = $(eval $(call _include-makefile,$(1)))

Then one can do:
# GNUmakefile
$(call include-makefile,make/

# make/
$(call include-makefile,$(dir __FILE__)/

Does anyone see any problems with the above?  Is '/' a valid character in a 
macro name?

NOTICE: If received in error, please destroy and notify sender.  Sender does 
not waive confidentiality or privilege, and use is prohibited.

reply via email to

[Prev in Thread] Current Thread [Next in Thread]