Re: how to use wildcard in prerequisite

[hans . peter . van . lohuizen]

Thanks Paul and Mike for your enlighting comments!

I am really almost there there now, but I am still struggling with a (maybe) small issue.
Let me explain what I want to achieve:

I use a flat dir. structure like:
module_top/project/cmd/a.tcl b.tcl
module_b/project/cmd/a.tcl b.tcl
modue_c/project/cmd/a.tcl b.tcl sub.tcl

Module_b and module_c are submodules under module_top. Results of .tcl scripts are written into gen.out under project.

What I want to achive is to have one generic makescript (located under module_top/project) updating first module_c and 
module_b in the corresponding dir's and than the toplevel in module_top dir.
I use command lines like:

MODULES = module_c module_b module_top 
GEN_MOD = $(foreach OBJ,$(MODULES),../../$(OBJ)/project/gen.out)

%project/gen.out : $(addprefix %, $(wildcard cmd/*.tcl))
                cd $* ;\
                <run commands>;\
                cd - ;

generic : $(GEN_MOD)

run gmake generic

What I see now is that as long as the .tcl files in all directories are the same (so sub.tcl removed for module_c) 
this works fine.
As soon as I add one different file, It does not seem to work right: 
when touching i.e. sub.tcl for module_c, (and the other files are up to date) 
gmake does not see sub.tcl and still finds everything up to date.
So the basic question is: is it really true that all dependencies should be the same (and even the same number) 
to have this working?
Or what should I do to be able to have different dependencies possible for different modules.

Thanks a lot,

Hans Peter.

"Paul D. Smith" <address@hidden> Sent by: "Paul D. Smith" <address@hidden> 2003-09-03 05:52 Please respond to "Paul D. Smith"

To:        Hans Peter van Lohuizen/EHV/SC/address@hidden         cc:        address@hidden         Subject:        Re: how to use wildcard in prerequisite         Classification:

%% address@hidden writes:

  hpvl> I want to define a dependency for several files in the cmd directory
  hpvl> like this: 

  hpvl> %project/out : %cmd/*.tcl 
  hpvl> This failed, the * did not expand as far as I could see. 

Correct.  GNU make never expands wildcards like * (except through using
the $(wildcard ...) function).

  hpvl> Now I tried: 
  hpvl> %project/out : %$(wildcard cmd/*.tcl) 

No, this won't work.  Variables and functions are expanded immediately
when in an immediate context, and both target and prerequisites are
immediate contexts (see the GNU make manual for a description of all
immediate and deferred contexts).

Patterns are not expanded until much later, after all the makefiles have
been read in and make is trying to match the pattern.  So, the above
expands to this (assuming you have a.tcl, b.tcl, and c.tcl in your cmd
directory) in make's internal rules database:

  %project/out : %cmd/a.tcl cmd/b.tcl cmd/c.tcl

which is exactly what you say you saw.

  hpvl> Now I tried a work around like: 
  hpvl> CMD = $(shell ls cmd/*.tcl | sed 's/cmd/%cmd/') 
  hpvl> %project/out: $CMD 

  hpvl> Now it works as I would expect. 

Why not use something like:

    %project/out : $(addprefix %,$(wildcard cmd/*.tcl))

and avoid using the shell and sed altogether?

  hpvl> Could this be a bug?

All of the above behavior is correct and exactly as documented in the
GNU make manual.

Good luck!

-- 
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