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Help using "eval" ala section 8.8
From: |
Caleb Epstein |
Subject: |
Help using "eval" ala section 8.8 |
Date: |
Mon, 29 Mar 2004 18:43:01 -0500 |
User-agent: |
Mutt/1.5.5.1+cvs20040105i |
I'm having difficulty using "eval" with an example taken more
or less verbatim from the GNU Make manual, section 8.8. I am
using GNU make 3.80 on a GNU/Debian Linux box.
Here's my Makefile:
---
PROGRAMS = hello
hello_OBJS = hello.o
# Everything after this is generic
.PHONY: all
all: $(PROGRAMS)
define PROGRAM_template
$(1): $$($(1)_OBJ) $$($(1)_LIBS:%=-l%)
ALL_OBJS += $$($(1)_OBJS)
endef
$(foreach prog,$(PROGRAMS),$(eval $(call PROGRAM_template,$(prog))))
$(PROGRAMS):
$(LINK.o) $^ $(LDLIBS) -o $@
clean:
rm -f $(ALL_OBJS) $(PROGRAMS)
---
I have a hello.c which is a simple hello world program, but
when I type "make", I just get this output:
---
cc -o hello
cc: no input files
make: *** [hello] Error 1
---
Looking at the output of "make -p", the "hello" target is
listed with no dependencies. This is, I assume, why hello.o
is not being build and is not being included in the link phase.
Any thoughts on how to make this work?
# Implicit rule search has not been done.
# Implicit/static pattern stem: `'
# Modification time never checked.
# File has been updated.
# Failed to be updated.
# automatic
# @ := hello
# automatic
# % :=
# automatic
# * :=
# automatic
# + :=
# automatic
# | :=
# automatic
# < :=
# automatic
# ^ :=
# automatic
# ? :=
# variable set hash-table stats:
# Load=8/32=25%, Rehash=0, Collisions=1/17=6%
# commands to execute (from `Makefile', line 17):
$(LINK.o) $^ $(LDLIBS) -o $@
--
Caleb Epstein | bklyn . org | It is far better to be deceived than to be
cae at | Brooklyn Dust | undeceived by those we love.
bklyn dot org | Bunny Mfg. |
- Help using "eval" ala section 8.8,
Caleb Epstein <=