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Re: generation of rules specified on the command line

From: Noel Yap
Subject: Re: generation of rules specified on the command line
Date: Fri, 14 May 2004 07:57:51 -0400
User-agent: Mozilla Thunderbird 0.5 (Windows/20040212)

Why not:

        make foo.o bar.o


Levent Yilmaz wrote:

Dear All,

My problem is quite simple, but I couldn't come up with any solution but one which is convoluted and far from being elegant. I will display it, but of course first thing's first. Here is my simple problem:

PROBLEM: Generate rules based on the targets *specified at the time* make is run, and make them. For example,
%> make foo.cpp bar.f90
would generate targets 'foo.o' and 'bar.o'. And make them based on the implicit rules stated in the makefile, for compiling C++ and F90 source files respectively. (that is to say, compile individual files only, do not build anything)

The following takes care of that, but in a rather poorly fashion (IMO):
# satisfy targets given on the command line
%.o : %.cpp
    c++ -c $<
%.o : %.f90
    f90 -c $<

all  : $(addsuffix .o,$(basename $(MAKECMDGOALS)))

This works when called as:
%> make all foo.cpp bar.f90

The phony 'all' is necessary since no other target that is specified on the command line (foo.cpp or bar.f90) actually exists explicitly in the makefile. But then, the last line with .DEFAULT is necessary since $(MAKECMDGOALS) contains the phony 'all', and therefore 'all.o' becomes one of the prerequsites for 'all'. But naturally a rule for the target 'all.o' does not exist (hopefully). This is one of the reasons why this solution is not favourable.

What do you think is the proper way to deal with such a problem?

Thank you so very much.

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