(no subject)

[Michael Wood]

Hi there,

I am trying to create either some generic targets or defines (define -
endef) wrappers that can contain MAKE cmds as well as actual build cmds. To
further complicate things, I also want to use pattern matching rules, and
have said dynamically created cmd sequences use the matched part of the
pattern. For example, I would like to do something like the following:

# Here is my scheme with a single generic target
#
ALL_TESTS = test_one  test_two  test_three

test_% : SCRIPT_FILE = my_script_$*             # dynamic set of some
param(s)

$(ALL_TESTS) : test_% : run_test        # use generic target to
                                                        # run all tests
using dynamic
                                                # param(s)
run_test :
ifeq (1,$(SUBMIT_JOB_TO_Q))
    bsub $(SCRIPT_FILE)
else
    $(SCRIPT_FILE)
endif

# The problem with this scheme is that within the "run_test" target
# the variable SCRIPT_FILE cannot expand the `$*` to the
# pattern-specific variable definition from test_%. I have tried
# defining SCRIPT_FILE using `:=`, however the "run_test" target
# still has no value for the `$*` portion of the definition. So...
# onto attempt number two...


# Here is my scheme with a generic define-endef attempt
#
ALL_TESTS = test_one  test_two  test_three

test_% : SCRIPT_FILE = my_script_$*     # dynamic set of some param(s)

$(ALL_TESTS) : test_% :                         # use generic canned cmd
sequence
$(run_test)                                             # containing
conditional MAKE cmds as well

define run_test
ifeq (1,$(SUBMIT_JOB_TO_Q))
    bsub $(SCRIPT_FILE)
else
    $(SCRIPT_FILE)
endif
endef

# This solves the `$*` problem from the previous solution. However,
# the problem with this one is that I cannot end up mixing MAKE cmds
# and actual build cmds (the ones preceded w/ a tab char) into the
# `define` as I have done in this example (make returns an error).
# I further cannot put a TAB char in front of the $(run_test) action
# because I need to use some conditional execution from within MAKE
# using MAKE variables (and the TAB in front would make the whole define
# a canned-cmd sequence and thus each line would be executed in a
# separate shell = undesireable for my needs).

Holy long email batman! I hope this is a reasonably coherant enough
explanation of what I am trying to do. And I also hope that you have some
ideas.

Thanks very much,
Mike


-------------------------------------------
Michael Wood
Apps Engineering
Broadcom UK Ltd.
Cambridge, UK
+44 (1223) 725-557