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Re: help needed on include an -I

From: Paul D. Smith
Subject: Re: help needed on include an -I
Date: Tue, 19 Apr 2005 13:55:03 -0400

%% "Martin Mensch" <address@hidden> writes:

  mm> This was also my thought. If you call make and a dependency file
  mm> doesn't exist but still the .c file is older than the .o file the
  mm> other dependencies of that .c-file are not checked and this
  mm> *might* cause trouble.

It definitely will, so don't do that!

  mm> Then Greg Chicares posted also on 12. Apr :

  mm> Dependency files cache information that this technique needs;
  mm> it breaks if you remove them. Make won't recreate them when
  mm> that happens--they're created only as a side effect of the .o
  mm> rule. But you could guard against that by executing
  mm>   for z in *.o; { [ ! -e ${z%.o}.d ] && rm $z }
  mm> to remove any .o file whose .d file is gone.

That must have been just pseudo-code; it's not legal sh syntax.

  mm> But I couldn't get this running and also I couldn't find "for" in the 
make manual. But I found foreach and tried something with that. 

That's because "for" is a shell command, not a make command, and the
above is a shell script (but, as I say, it's not valid).

Without saying anything about whether this will work the way you expect
or not, a valid, portable sh syntax for the above would be something like:

 for z in $(basename $(wildcard $(OBJDIR)/*.o)); do [ -r $$z.d ] || rm -f 
$$z.o; done

  mm> I have defined a search path with vpath to make sure that the
  mm> .d-file is found in $(OBJDIR).

That doesn't matter.  Your rule HAS TO build the target that you said it
would.  That's just how make works.

  mm> But generaly spoken I don't see why there should be any
  mm> restrictions of what the rule does. If it is neccessary for my
  mm> purpose (what ever that may be) I can create files at any
  mm> place. Isn't that right?

You can write a rule to create a file anywhere you want.  But if you
want make to work correctly, then the command you provide must create
the file that you told make that it would create.

Make reads your makefile, and your makefile is the recipe for how to
rebuild files.  A rule like this in a makefile:

    <target> : <prerequisites>

means this to make: "The file <target> depends on the files
<prerequisites>.  If the prerequisites are newer than the target, then
if you ask the shell to run the shell script <command>, it will bring
the target up to date".

If your <command> script does not update <target>, then you've
effectively lied to make and make won't work properly... this is a bug
in your makefile just like a bug in source code.

In your case you have a rule that says:

    %.d: %.c
            <create $(OBJDIR)/%.d>

See how this is wrong?  Make wants to update "foo.d", and it finds this
rule that you told it would update "foo.d".  But when the command is run
it doesn't actually update "foo.d", it updates "$(OBJDIR)/foo.d", which
is a completely different file.

Try reading some of the papers at my web site below, related to VPATH,

 Paul D. Smith <address@hidden>          Find some GNU make tips at:            
 "Please remain calm...I may be mad, but I am a professional." --Mad Scientist

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