Clarification needing regarding auto-generating prerequisites

[Thulasidhar JK]

Hello,
I am a novice to complicated makefiles and today while trying to write
a makefile that generates the included C headers automatically from C
source, i came across this piece of code in the Make manual
(http://www.gnu.org/software/make/manual).

%.d: %.c
        @set -e; rm -f $@; \
         $(CC) -M $(CPPFLAGS) $< > address@hidden; \
         sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < address@hidden > $@; \
         rm -f address@hidden

i understand that the CC with -M outputs the included headers and the
source in a makefile target: rule fashion. but the use of sed is what
is getting me into confusion.
As the example quotes,
        main.o : main.c defs.h
gets generated when the `$(CC) -M $(CPPFLAGS) $<` is executed
but what is the use of converting this output into 
        main.o main.d: main.c defs.h
using sed?
why should the .d file depend on the include file of the source, when
it already has a rule that says .d depends upon .c . Even if the
defs.h changes, how would that affect the contents of main.d i.e., why
should main.d be updated if defs.h changes?
This is as per my understanding. Can u please verify whether it is correct?

regards
thulasidhar