generating multiple object files -- the current solution

[Robert P. J. Day]

  based on the last couple of replies here (thanks muchly), here's the
solution i came up with:

=========================================
define gen-obj-names
$(addsuffix .o,$(sort $(shell grep -h "^\#ifdef L_" ${1} | sed -e "s/^\#ifdef 
L_"//)))
endef

define multisrc-rule-template
$(call gen-obj-names,${1}) : ${1}
        gcc -DL_$$(basename $$@) $$< -o $$@
endef

MULTISRCS := $(shell grep -l "^\#ifdef L_" $(wildcard *.c))
$(foreach src,${MULTISRCS},$(eval $(call multisrc-rule-template,${src})))
=========================================

  the only problem, though, is that someone suggested that invoking a
"call" from within an "eval" is not guaranteed to work in make-3.80
and earlier versions.

  is there anything about the above that could cause problems in older
versions of make?  if there is, then it's not really a usable solution
for me.   thanks.

rday