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Request for help in setting a variable in GNU Make.


From: Louie McCrady
Subject: Request for help in setting a variable in GNU Make.
Date: Wed, 05 Apr 2006 17:04:31 -0700

In the example below I'm having trouble defining or setting the variable
"sourceFiles".  I want it to contain a list of all the .cpp files that
are newer than my target, or have missing .o files, or have other
dependencies that have been touched.

Drop this Makefile into any directory that contains *.cpp files:

objectFiles = $(patsubst %.cpp,%.o,$(wildcard *.cpp))
sourceFiles = "hello"

myprog.exe : $(objectFiles)
        @echo "all sources to be compiled :  $(sourceFiles)"

%.o : %.cpp
        @echo "Adding $< to the list to be compiled"
        set sourceFiles += $<
        @echo "sanity check: --- $(sourceFiles) --- $@ --- $< ---"


The main thrust of my endeavor here is to gather a list of all .cpp
files that need to be compiled, and pass them to the compiler in one
shot rather than invoking the compiler separately for each .cpp file.

I've tried many variations on setting this but have had no luck.

        set sourceFiles = ${sourceFiles} $<
        sourceFiles := ${sourceFiles} $<
        export sourceFiles="$(sourceFiles) $<"
        many other odd variations that simply don't work

The best I can do is to get the Makefile to print out something like:

Adding foo1.cpp to the list
set sourceFiles += foo1.o
sanity check: --- hello --- foo1.o --- foo1.cpp ---
Adding foo2.cpp to the list
set sourceFiles += foo2.o
sanity check: --- hello --- foo2.o --- foo2.cpp ---
Adding foo3.cpp to the list
set sourceFiles += foo3.o
sanity check: --- hello --- foo3.o --- foo3.cpp ---
all sources to be compiled:  hello


I would expect the last line to read something like:

all sources to be compiled:  hello foo1.cpp foo2.cpp foo3.cpp


I think that the problem is the scope of the sourceFiles variable in the
implicit rule is different from the sourceFiles variable outside of the
implicit rule.  I'm not sure how to change the value of the variable
defined outside of the implicit rule.  Another example might be an even
simpler Makefile like this:
 
myVar = snafu 
target:
        myVar = "hello"
        @echo "--- $(myVar) ---"

which yeilds:
myVar = "hello"
--- snafu ---


Any help would be greatly appreciated.

Louie.

Running:
Fedora Core 3
GNU Make 3.80









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