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How to write such Makefile

From: pacia pacia
Subject: How to write such Makefile
Date: Thu, 16 Apr 2009 00:24:13 +0800


Suppose in Makefile1
PRODCTS := pa  pb
pa_SOURCES := pa1.c  pa2.c
pb_SOURCES := pb1.c  pb2.c

In Makefile2(including Makefile1)
OBJ_DIR  :=  /obj

How to get the following variables in Makefile2?
pa_OBJS := /obj/pa1.o   /obj/pa2.o
pb_OBJS := /obj/pb1.o   /obj/pb2.o
The requirements are,
- xx_OBJS can only be got from xx_SOURCES(e.g. by functions),
  can not be hard-coded in Makefile1
- Makefile2 should be common and no code change is needed while
  new products(pc, pd...) are added into PRODUCTS in Makefile1

I wrote the following code but it does not work,
define OBJS_template
$(1)_OBJS := $(addprefix $(OBJ_DIR)/,$(addsuffix .o, $(basename
$(notdir $$($(1)_SOURCES)))))
$(foreach p, $(PRODUCTS),$(eval $(call OBJS_template,$(p))))


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