Question about recursive make

[Erik Lotspeich]

Hi,

I have a question about recursive make.  I have the FSF GNU Make book by
Richard Stallman & Roland McGrath (covering Make version 3.77).  In this
book, it describes the following as equivalent:

cd dirname && $(MAKE)

$(MAKE) -C dirname

It seems that these are not equivalent, however.  When integrating a
Makefile system with the Linux Kernel build system, these two forms have
different effects.  The first form works; the second form doesn't.

I will clarify what I mean by integrating with the Linux Kernel build
system.  For building with the Linux Kernel I will have a Makefile in a
directory (e.g. kernelmod) that looks like this:

module: mymodule.c
        make -C $(KDIR) M=$(PWD) PWD=$(PWD) module

In a directory one up from this Makefile, I would like to be able to write:

$(MAKE) -C kernelmod

This leaves kernel files such as modules.order and Modules.symvers in
this toplevel directory.  If I use the following:

cd kernelmod && $(MAKE)

Then, the files are in the kernelmod directory, as expected.

Any help sorting this out would be greatly appreciated.

Regards,

Erik