Target specified by an empty variable

[Glenn Morris]

Hi,


I have a Makefile that looks something like this:

all: go

foo = something

go : go.c $(foo)
        gcc -o go go.c

$(foo):
        @echo foo


My question is, if foo is empty, ie:

foo = 

which means that the $(foo) rule has no target (?), is the resulting
Makefile valid and portable? It seems to work OK with GNU make, but I
am not sure if I can rely on that.

The actual Makefile is generated by autoconf, and $foo is only
non-empty on certain platforms. I am wondering if that is OK, or if I
need to set $foo to some non-empty, dummy value.


TIA for any help.