Re: #include in a C file

[ali hagigat]

Hello Sam, thank you to respond. I have copied part of the make manual:
---------------------------------------------------------------------------------
4.13 Generating Prerequisites Automatically
This makes each ‘.d’ file depend on all the source and header files
that the corresponding
‘.o’ file depends on. make then knows it must regenerate the
prerequisites whenever any of
the source or header files changes.
---------------------------------------------------------------------------------
I guess you have the make manual. So if you read the section 4.13, you
will face with those statements as I have copied above.
My question is that when the source or header files changes what
prerequisites will be generated??
Would you please just read the section 4.13? I fear to copy the whole of it...

My second question is that:
cc -M will generate some extra rules for our original makefile, isn't
it? so why we need to write that implicit rule(%.d:%.c and sed....) to
create a new makefile and then include it? We have the rules, GCC is
generating them, the manual said so , but why the manual changes its
word and start talking about creating a new makefile and including it
inside our original makefile?
Regards

On 12/5/10, Sam Ravnborg <address@hidden> wrote:
> On Sun, Dec 05, 2010 at 11:48:03AM +0330, ali hagigat wrote:
>> This makes each ‘.d’ file depend on all the source and header files
>> that the corresponding
>> ‘.o’ file depends on. make then knows it must regenerate the
>> prerequisites whenever any of
>> the source or header files changes.
>> -------------------------------------------------------------------------------------------------------------------------
>> What is inside each .d file?
>
> Quote from the manual:
> =============================================
> Here is the pattern rule to generate a file of prerequisites (i.e., a
> makefile) called name.d from a C source file called name.c:
>
>      %.d: %.c
>              @set -e; rm -f $@; \
>               $(CC) -M $(CPPFLAGS) $< > address@hidden; \
>               sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < address@hidden > $@; \
>               rm -f address@hidden
> See Pattern Rules, for information on defining pattern rules. The ‘-e’ flag
> to the shell causes it to exit immediately if the $(CC) command (or any
> other command) fails (exits with a nonzero status). With the GNU C compiler,
> you may wish to use the ‘-MM’ flag instead of ‘-M’. This omits prerequisites
> on system header files. See Options Controlling the Preprocessor, for
> details.
>
> The purpose of the sed command is to translate (for example):
>
>      main.o : main.c defs.h
> into:
>
>      main.o main.d : main.c defs.h
> This makes each ‘.d’ file depend on all the source and header files that the
> corresponding ‘.o’ file depends on. make then knows it must regenerate the
> prerequisites whenever any of the source or header files changes.
> =============================================
>
> And you asked "What is inside each .d file?".
>
> If you read the above it is IMO obvious that the content of the .d file in
> this example is the output
> of the sed command.
> The manual say: "into: main.o main.d : main.c defs.h".
>
>> When a source or header file changes, what prerequisites will be
>> generated?
> I can not follow your question. Please provide some more context.
> Knowing you have read the manual I assume this is not the simple question it
> looks like.
>
>       Sam
>