Re: Recompile files for different parameters

[Greg Chicares]

On 2011-03-08 07:53Z, Matthias Fechner wrote:
> 
> I attached two small c files, a header file and the Makefile.
> 
> Copy it to a directory and execute:
> make
> 
> then execute:
> make debug
> 
> You see, it does not remake the hello.o, but it should because the code 
> changes.

To investigate Mark's suggestion, add this at the top of your makefile:
  MAKEFILE := $(lastword $(MAKEFILE_LIST))
  test.out a.o hello.o: $(MAKEFILE)
All of the gcc output files thus depend on the makefile, so they're all
rebuilt whenever you edit the makefile and run 'make' again. With that
technique, you don't have to remember to 'make clean' after every change
to the makefile.

However, it now appears that you're not editing the makefile in order to
distinguish normal from debug builds. Instead, you have a debug target
with target-specific $(CFLAGS), and you run either 'make' or 'make debug'
without changing the makefile. In that case, you might want to do each
type of build in a separate directory; see this comprehensive paper:
  http://mad-scientist.net/make/multi-arch.html
That way, you can update the debug build to analyze a problem, change
the source accordingly, and then just run 'make' to get a non-debug
version without recompiling code that didn't change.