Re: Can I generate multiple recipe commands dynamically in makefile

[Chen Jun (陈军)]

On 2011-05-19 22:38, Christian Rishøj Jensen wrote:
> I've often seen this question arise, and I keep wondering why people are 
> encouraged to use loop constructs, whether Make-native or shell loops.
>
> Why not just let Make's dependencies handle it?
>
> E.g.:
> ================
> define show
>          echo "[$1]"
> endef
>
> filelist = 1.c 2.c 3.c
>
> show-% :
>          @$(call show,$*)
>
> all : $(addprefix show-,$(filelist))
> ================
>
>
> Or, even just:
>
> ================
> filelist = 1.c 2.c 3.c
>
> show-% :
>          @echo "[$*]"
>
> all : $(addprefix show-,$(filelist))
> ================
>
>
> Is the addprefix function non-portable?
> Or is there some other argument that I am unaware of?
>
> – Christian
Thanks to your answer, Christian. I admit your solution is viable in 
most cases. However, this solution complicates the makefile. You know, 
sometimes, we do not mean to have dependency, for examples, filelist is 
a list of some filepaths(may be relative path or absolute path), and I 
want to show(print) these path in a friendly way:
* for an absolute path, print it as it is;
* for a relative path, print it as it is followed by its converted 
absolute path.
* find a status.txt file in each directory of a filepath, dump its 
content to console.

Since make has provided canned command sequence by define/endef, and 
$(eval is great), so I'm a bit frustrated to find out I cannot use them 
to generate multiple commands programmatically(make 3.82).

Perphaps I have a suggestion, introduce a new function

$(foreach-mkcmd var,list,cmd)

similar to $(foreach ), except that $(foreach-mkcmd ) can only be used 
in command section of a rule. Each time cmd is expanded, it generates a 
shell command. Isn't it a good idea?