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Re: Makefile C vs C++

From: Hernán
Subject: Re: Makefile C vs C++
Date: Wed, 19 Sep 2012 12:50:05 +0200

In the last mail I was confused about the macros that defines the compiler.
But, I finally found the makefile that sets the compiler.

Just to remember, I'm trying to include in an ANSI C project, some (OpenCV)
libraries made in C++.
When I included those libraries, the compiler threw the following error:

*ardrone_testing_tool.c:(.text+**0x1212): undefined reference to
ardrone_testing_tool.c:(.text+**0x126f): undefined reference to

Basically people told me to change the compiler to the g++ (if anyone think
about a better solution, please tell me). The main Makefile of the project
uses some standard variables like MAKE, which calls recursively another
makefile, in the folder VP_SDK/Build.

In that folder, the other makefile has some sections which calls again
another makefiles to configure variables and so on. Finally it calls
generic.makefile which sets the compiler and does the compilation.
The point is that now, when I changed the word gcc by g++ the compilation
didn't work (the original version which had worked with the gcc).
The error that it gives is the following:

*../../VLIB/video_codec.c: In function ‘int
video_codec_open_private(video_controller_t*, codec_type_t, int32_t)’:
../../VLIB/video_codec.c:75: error: invalid conversion from ‘void*’ to
../../VLIB/video_codec.c: In function ‘int
video_codec_type_select(video_controller_t*, video_stream_t*)’:
../../VLIB/video_codec.c:190: error: invalid conversion from ‘uint32_t’ to
../../VLIB/video_codec.c:190: error:   initializing argument 2 of ‘int
video_codec_open_private(video_controller_t*, codec_type_t, int32_t)’
../../VLIB/video_codec.c: In function ‘int
video_encode_picture(video_controller_t*, const vp_api_picture_t*,
../../VLIB/video_codec.c:198: error: invalid conversion from ‘int’ to
../../VLIB/video_codec.c: In function ‘int
video_decode_picture(video_controller_t*, vp_api_picture_t*,
video_stream_t*, int32_t*)’:
../../VLIB/video_codec.c:237: error: invalid conversion from ‘int’ to

That is, an error previously hadn't detected by the gcc.
So, I think maybe I should differentiate in the code the treatment of .cpp
files and the other files.

Below in the post you will see some parts of the code. In the macro
INTERNAL_SOURCE_EXTENSIONS, there are defined the extensions .c .S .s .cpp.
You can see also that there are some other macros that depend on that...
For example INTERNAL_BINARIES_COMMON_TARGET_OFILES, which after is used to
do different things (and compilation of course).
Anyway, I'm thinking of doing something like duplicating some macros, to do
the compilation in two parts (on one side .c .S .s and on the other .cpp).
I don't know much about makefiles, so I would like to know what do you
think about that. Is that convenient to do? There is another better or
easier way to make it work?
Here I show you some lines of the file generic.makefile, but I could put
all the code if you think is necessary.
I will be really appreciated if you give me some help. May be for some of
you is not quite difficult to see the changes that has to be made in the
complete version of the code.

> # (in) GENERIC_ADD_OFILES : for linking with     # (in)
> : for .o files
> $(patsubst
> for .o files
> $(patsubst
> $(patsubst %$(ext),$(GENERIC_BINARIES_TARGET_DIR)/%.o,$(filter


ifeq ($(USE_DLL),yes)

> $(GENERIC_TARGET_BINARIES_DIR)/$(DLL_ID)_exports.o --export-all-symbols -l

> /,_,$*))


> /,_,$*))


# Build rules for each extension
> $(foreach ext,$(INTERNAL_SOURCE_EXTENSIONS),$(eval $(call
> $(foreach ext,$(INTERNAL_SOURCE_EXTENSIONS),$(eval $(call
> ifneq ($(MAKECMDGOALS),clean)
> ifneq ($(MAKECMDGOALS),check)
> endif
> endif

Thank You all for any comments that you could give me.

Best Regards,


2012/9/18 Hernán <address@hidden>

> Thank you very much Greg,
> I've taken a look at that folder, and there is one Makefile, and several
> files with the format *.makefile.
> What I did, initially was to look for the word gcc, but as it seems it
> didn't work (*). After I saw in the main Makefile some sections that seems
> to invoque the compilator, but I don't know how to know what macro is.
> As it is shown in next paragraphs, that sections includes the calls to
> ADD_RULE_TEMPLATE and GENERIC_RULES_TEMPLATE. I think they both set the
> compiler with the macro $(1), but, how is that determined?, I suppose that
> is the first argument given to the function, but in the call sentence it
> doesn't seem to send the compiler type... at least is not in the format
> "gcc" that I expected...
> The section concerning ADD_RULE_TEMPLATE is the following :
>>   ifeq ($$(USE_$(shell echo $(1) | tr "a-z" "A-Z")),yes)
>>     TO_BUILD+=build_$(1)
>>   endif
>> endef
>> # Add rule for each target
>> $(foreach target,$(TARGETS),$(eval $(call ADD_RULE_TEMPLATE,$(target))))
> After, the section concerning GENERIC_RULE_TEMPLATE is :
>> .PHONY: $(foreach target,$(TARGETS),build_$(target) clean_$(target))
>>     @if [ $(MAKECMDGOALS) ] && [ $(MAKECMDGOALS) = check ] ; then
>> $(SDK_SOURCE_DIR)/Build/ $(SDK_SOURCE_DIR)/Build END ; fi
>> before_check:
>>     @if [ $(MAKECMDGOALS) ] && [ $(MAKECMDGOALS) = check ] ; then rm -rf
>> *.log ; fi
>>   ifneq ($(1),dll)
>>     build_$(1): before_check
>>     @$(MAKE) -f $(1).makefile $(MAKECMDGOALS)
>>   endif
>> endef
>> build_dll: before_check
>>     @$(MAKE) -f app.makefile $(MAKECMDGOALS)
>> # Build rules for each target
>> $(foreach target,$(TARGETS),$(eval $(call
> (*)
> I saw that in the main Makefile, there are some calls to two of those
> files *.makefile, which seems to check the variables and versions. The
> others *.makefile dont seem to be used, but in one of them I found a
> common.makefile which defines a macro called XCC,
> (XCC=$(GENERIC_COMMAND_PREFIX)gcc). Again, some macros are not defined in
> the makefile. This GENERIC_COMMAND_PREFIX is defined in some other
> sysvar.makefile, which is usually called in the main Makefile to throw
> errors and say the version of gcc. Which I think could omit. I'm mentioning
> that just in case I omit something important.
> If necessary I could send more information. I hope the explanation was
> clear.
> Thank you again for your time,
> Hernán
> 2012/9/18 Greg Chicares <address@hidden>
>> On 2012-09-17 19:25Z, Hernán F.B. wrote:
>> > I'm trying to include in an ANSI C project, some (OpenCV) libraries
>> made in
>> > c++.
>> > Basically people told me to change the compiler to the g++, but the
>> > makefile of this project is quite unusual for my experience in
>> makefiles,
>> > and I don't find out what macro to change. It uses some standard make
>> > variables like MAKECMDGOALS and MAKE (which calls recursively makefile).
>> > Here is the main part of the make file (without the macro's
>> declaration):
>> >
>> > .PHONY: $(TARGET) build_libs
>> >
>> > all: build_libs $(TARGET)
>> >
>> > $(TARGET):
>> >     @$(MAKE) -C $(SDK_PATH)/VP_SDK/Build $(TMP_SDK_FLAGS) $(SDK_FLAGS)
>> As you said, this invokes 'make' recursively. The '-C' option
>> invokes 'make' in directory $(SDK_PATH)/VP_SDK/Build . Probably
>> that directory contains a submakefile that invokes the compiler.
>> Examine that submakefile to determine what changes may be needed
>> to support C++.
>> _______________________________________________
>> Help-make mailing list
>> address@hidden

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