Re: Unnecessary prerequisite computation

[Paul Smith]

On Wed, 2013-07-10 at 08:07 -0400, Martin d'Anjou wrote:
> I am intrigued by the behaviour of make with this makefile:
> 
> t1: $(info t1 deps)
>     echo Done $@
> t2:
>     echo Done $@
> $ make t2
> t1 deps
> Done t2
> $

> Make unnecessarily computes the dependencies for target t1 but t1 is
> not a target in this scenario.

All target and prerequisite lists are considered to have "immediate"
evaluation mode; that is, as soon as the line is encountered by make's
file parser, long before it even thinks about what targets to build,
make will expand all variables (and functions) that appear in either the
target or prerequisite lists.

So, it's not the case that make will wait and not expand prerequisite
lists until it decides that the target needs to be built (obviously
targets _must_ be expanded immediately).  This is the intended and
documented behavior.  Whether it's the best method or not, I'm not sure.
I can think of a number of ways that changing this would introduce
backward-compatibility failures.  I'm not even sure that POSIX allows it
(although POSIX is so limited it's possible that there's no way to tell
the difference in a compliant makefile).

I have no objection to you filing an enhancement request, but honestly I
doubt we will ever implement this as it would be an enormous change and
the backward-compat issues are, to say the least, complex.

You can get the behavior you want with .SECONDEXPANSION, I think:

    .SECONDEXPANSION:
    t1: $$(info t1 deps)
            echo Done $@
    t2:
            echo Done $@