From d98220c0b83fb1585bec1dd76b5437584cbbf1b9 Mon Sep 17 00:00:00 2001
From: Arthur Heymans <address@hidden>
Date: Tue, 17 May 2016 11:40:50 +0200
Subject: [PATCH] add c3 and c4 state to macbooks

This are identical to x60/t60
---
 .../0001-macbook21-enable-c3-and-c4-states.patch   | 79 ++++++++++++++++++++++
 1 file changed, 79 insertions(+)
 create mode 100644 resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/macbook21/0001-macbook21-enable-c3-and-c4-states.patch

diff --git a/resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/macbook21/0001-macbook21-enable-c3-and-c4-states.patch b/resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/macbook21/0001-macbook21-enable-c3-and-c4-states.patch
new file mode 100644
index 0000000..9eed3ec
--- /dev/null
+++ b/resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/macbook21/0001-macbook21-enable-c3-and-c4-states.patch
@@ -0,0 +1,79 @@
+From 1bf5f9425676431a6d9ec2788a82a8ebc3c924fe Mon Sep 17 00:00:00 2001
+From: Arthur Heymans <address@hidden>
+Date: Tue, 17 May 2016 11:36:42 +0200
+Subject: [PATCH] macbook21: enable c3 and c4 states
+
+same as x60
+
+Change-Id: I2a8a99709d1203bf0f84b0c0b9d653d108547a31
+
+diff --git a/src/mainboard/apple/macbook21/mainboard.c b/src/mainboard/apple/macbook21/mainboard.c
+index 79383cb..9608e15 100644
+--- a/src/mainboard/apple/macbook21/mainboard.c
++++ b/src/mainboard/apple/macbook21/mainboard.c
+@@ -33,35 +33,42 @@
+ #define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
+ 
+ static acpi_cstate_t cst_entries[] = {
++#define MWAIT_RES(state, sub_state)                         \
++	{                                                   \
++	  .space_id = ACPI_ADDRESS_SPACE_FIXED,		    \
++	  .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,          \
++	  .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,          \
++	  {						    \
++		  .resv = 0,				    \
++	  },						    \
++	  .addrl = (((state) << 4) | (sub_state)),          \
++	  .addrh = 0,                                       \
++	}
++
++static acpi_cstate_t cst_entries[] = {
+ 	{
+ 		.ctype = 1,
+ 		.latency = 1,
+ 		.power = 1000,
+-		.resource = {
+-			.space_id = ACPI_ADDRESS_SPACE_FIXED,
+-			.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
+-			.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
+-			{
+-				.resv = 0,
+-			},
+-			.addrl = 0,
+-			.addrh = 0,
+-		}
++		.resource = MWAIT_RES(0, 0),
+ 	},
+ 	{
+ 		.ctype = 2,
+ 		.latency = 1,
+ 		.power = 500,
+-		.resource = {
+-			.space_id = ACPI_ADDRESS_SPACE_FIXED,
+-			.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
+-			.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
+-			{
+-				.resv = 0,
+-			},
+-			.addrl = 0x10,
+-			.addrh = 0,
+-		}
++		.resource = MWAIT_RES(1, 0),
++	},
++	{
++		.ctype = 3,
++		.latency = 17,
++		.power = 250,
++		.resource = MWAIT_RES(2, 0),
++	},
++	{
++		.ctype = 3,
++		.latency = 34,
++		.power = 200,
++		.resource = MWAIT_RES(3, 0),
+ 	},
+ };
+ 
+-- 
+2.8.2
+
-- 
2.8.2