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[Lightning] Initial work on mips port - hints on setting it up?

From: Paulo César Pereira de Andrade
Subject: [Lightning] Initial work on mips port - hints on setting it up?
Date: Tue, 5 Oct 2010 18:47:23 -0300


  Since I have access to a loongson based computer and I am still
doing some work
related to lightning, it would be a shame to not work on a mips port :-)

  Right now I am having trouble to get the very first tests to run...

  I just pushed some changes to to match my
question here :-)

  Now the question, and please forgive my stupidity if I am doing
something stupid.

  The attached C file dissasembles correctly in gdb, and is my current
test case.
The "d" function is because I cannot step in gdb, so, I usually run
something like:

(gdb) b d
(gdb) r
(gdb) x/20i code

and the mmap is because it cannot atleast disassemble static buffers.

  Now the problem:

$ gdb a.out
GNU gdb 6.8-6mdv2009.1 (Mandriva Linux release 2009.1)
Copyright (C) 2008 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.  Type "show copying"
and "show warranty" for details.
This GDB was configured as "mipsel-mandriva-linux-gnu"...
(gdb) b d
Breakpoint 1 at 0x400894
(gdb) r
Starting program: a.out

Program received signal SIGSEGV, Segmentation fault.
0x27bdffd8 in ?? ()
Missing debug package(s), you should install:
(gdb) x 0x27bdffd8
0x27bdffd8:     Cannot access memory at address 0x27bdffd8
(gdb) x/40i code
0x2aacc000:     addiu   sp,sp,-40
0x2aacc004:     sw      sp,36(ra)
0x2aacc008:     sw      sp,32(s8)
0x2aacc00c:     sw      sp,28(s7)
0x2aacc010:     sw      sp,24(s6)
0x2aacc014:     sw      sp,20(s5)
0x2aacc018:     sw      sp,16(s4)
0x2aacc01c:     sw      sp,12(s3)
0x2aacc020:     sw      sp,8(s2)
0x2aacc024:     sw      sp,4(s1)
0x2aacc028:     sw      sp,0(s0)
0x2aacc02c:     move    s8,sp
0x2aacc030:     move    sp,s8
0x2aacc034:     lw      s0,0(sp)
0x2aacc038:     lw      s1,4(sp)
0x2aacc03c:     lw      s2,8(sp)
0x2aacc040:     lw      s3,12(sp)
0x2aacc044:     lw      s4,16(sp)
0x2aacc048:     lw      s5,20(sp)
0x2aacc04c:     lw      s6,24(sp)
0x2aacc050:     lw      s7,28(sp)
0x2aacc054:     lw      s8,32(sp)
0x2aacc058:     lw      ra,36(sp)
0x2aacc05c:     addiu   sp,sp,40
0x2aacc060:     jr      ra
0x2aacc064:     nop
(gdb) x/120i main
0x400a28 <main+352>:    jal     0x400750 <jit_flush_code>
0x400a2c <main+356>:    nop
0x400a30 <main+360>:    lw      gp,24(s8)
0x400a34 <main+364>:    nop
0x400a38 <main+368>:    lw      v0,-32688(gp)
0x400a3c <main+372>:    nop
0x400a40 <main+376>:    lw      v0,0(v0)
0x400a44 <main+380>:    nop
0x400a48 <main+384>:    sw      v0,32(s8)
0x400a4c <main+388>:    lw      v0,32(s8)
0x400a50 <main+392>:    nop
0x400a54 <main+396>:    lw      t9,0(v0)
0x400a58 <main+400>:    li      a0,1
0x400a5c <main+404>:    jalr    t9
0x400a60 <main+408>:    nop
0x400a64 <main+412>:    lw      gp,24(s8)
0x400a68 <main+416>:    jal     0x400878 <d>
0x400a6c <main+420>:    nop
0x400a70 <main+424>:    lw      gp,24(s8)
0x400a74 <main+428>:    move    v0,zero
0x400a78 <main+432>:    move    sp,s8
0x400a7c <main+436>:    lw      ra,52(sp)
0x400a80 <main+440>:    lw      s8,48(sp)
0x400a84 <main+444>:    lw      s0,44(sp)
0x400a88 <main+448>:    addiu   sp,sp,56
0x400a8c <main+452>:    jr      ra
0x400a90 <main+456>:    nop
0x400a94 <mips_prolog>: addiu   sp,sp,-32
0x400a98 <mips_prolog+4>:       sw      ra,28(sp)
0x400a9c <mips_prolog+8>:       sw      s8,24(sp)
0x400aa0 <mips_prolog+12>:      move    s8,sp
0x400aa4 <mips_prolog+16>:      sw      gp,16(sp)

  Sorry for the long email, but any hint is welcome. Trying to understand what
is wrong, and assuming the mprotect call in jit_flush_code does any cache sync
that may be required... (I am saving all callee registers in jit_prolog but may
rework that).


Attachment: mips.c
Description: Text Data

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