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Idea : load/stores with pre-decrement / post-increment


From: Paul Cercueil
Subject: Idea : load/stores with pre-decrement / post-increment
Date: Mon, 18 Dec 2023 11:08:43 +0100

Hi Paulo,

One pattern that I see quite often, is a store or load with address
pre-decrement or post-increment. Something like this:
addiu r0, r0, -1
str_c r0, r1

ldr_c r1, r0
addiu r0, r0, 1

Do you think it would make sense to have instructions for these?
Something like:

stdbr _c _s _i _l   O1 -= transfer size; *O1 = O2
lddbr _c _s _i _l   O2 -= transfer_size; O1 = *O2
stiar _c _s _i _l   *O1 = O2; O1 += transfer size
ldiar _c _s _i _l   O1 = *O2; O1 += transfer size

(stdbr/lddbr for "store decrement before" / "load decrement before",
stiar/ldiar for "store increment after" / "load increment after")

I know that ARM would support it, SuperH as well, and probably others.

I do not think that it would need support for offsets (ldx*/stx*), the
patterns I see always use a zero offset. I also do not think that we'd
need pre-increment or post-decrement, or support for other values than
the transfer size.

Thoughts?

Cheers,
-Paul



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