SIBL 1.01 (06/12/2009) - 266000000 Hz
Copyright 2009, Future Designs, Inc.
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DDR:   SDRAMCLK_CTRL = 0003CAA2
DDR:   DDR_LAP_NOM   = 0000002A (42)
DDR:   DDR_LAP_COUNT = 0000002A (42)
DDR:   DDR_CAL_DELAY = 00000008 (8)

LCD:   Turning on ... Done
NAND:  Initializing MLC ... OK
LCD:   Drawing splash screen ...  OK
NAND:  Initializing MLC ... OK
UBOOT: Loading to address 0x81FC0000 ...  OK
UBOOT: Running at 0x81FC0000... 


U-Boot 1.3.3 (Aug  3 2010 - 10:40:20)

DRAM:  32 MB
NAND:  256 MiB
In:    serial