[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-arm] [PATCH for-2.5] target-arm: Don't mask out bits [47:40] i
From: |
Laurent Desnogues |
Subject: |
Re: [Qemu-arm] [PATCH for-2.5] target-arm: Don't mask out bits [47:40] in LPAE descriptors for v8 |
Date: |
Fri, 20 Nov 2015 16:25:53 +0100 |
On Fri, Nov 20, 2015 at 4:20 PM, Peter Maydell <address@hidden> wrote:
> On 20 November 2015 at 15:18, Laurent Desnogues
> <address@hidden> wrote:
>> Hello,
>>
>> On Fri, Nov 20, 2015 at 3:32 PM, Peter Maydell <address@hidden> wrote:
>>> In an LPAE format descriptor in ARMv8 the address field extends
>>> up to bit 47, not just bit 39. Correct the masking so we don't
>>> give incorrect results if the output address size is greater
>>> than 40 bits, as it can be for AArch64.
>>>
>>> (Note that we don't yet support the new-in-v8 Address Size fault which
>>> should be generated if any translation table entry or TTBR contains
>>> an address with non-zero bits above the most significant bit of the
>>> maximum output address size.)
>>>
>>> Signed-off-by: Peter Maydell <address@hidden>
>
>>> + /* The address field in the descriptor goes up to bit 39 for ARMv7
>>> + * but up to bit 47 for ARMv8.
>>> + */
>>> + if (arm_feature(env, ARM_FEATURE_V8)) {
>>> + descaddrmask = 0xfffffffff000ULL;
>>> + } else {
>>> + descaddrmask = 0xfffffff000ULL;
>>> + }
>>
>> My understanding is that 48 bits are used if you are running AArch64
>> code, and 40 bits are used for 32-bit code even on an ARMv8 CPU, so
>> checking for ARM_FEATURE_V8 is perhaps not enough.
>
> For v8 32-bit code the usable address width is only 40 bits, but
> setting a bit in [47:40] causes an AddressSize fault on v8 (but not
> v7). So the mask should be 48 bits for v8 regardless of 32-vs-64,
> and when we support AddressSize faults we'll then check the upper
> bits of the masked-out address and raise a fault if needed.
That makes sense.
So here we go:
Reviewed-by: <address@hidden>
Thanks,
Laurent